发明授权
US07268632B2 Structure and method for providing gate leakage isolation locally within analog circuits
失效
在模拟电路中局部提供栅极泄漏隔离的结构和方法
- 专利标题: Structure and method for providing gate leakage isolation locally within analog circuits
- 专利标题(中): 在模拟电路中局部提供栅极泄漏隔离的结构和方法
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申请号: US11163013申请日: 2005-09-30
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公开(公告)号: US07268632B2公开(公告)日: 2007-09-11
- 发明人: Anthony R. Bonaccio , Hayden C. Cranford, Jr. , Joseph A. Iadanza , Stephen D. Wyatt
- 申请人: Anthony R. Bonaccio , Hayden C. Cranford, Jr. , Joseph A. Iadanza , Stephen D. Wyatt
- 申请人地址: US NY Armonk
- 专利权人: International Business Machines Corporation
- 当前专利权人: International Business Machines Corporation
- 当前专利权人地址: US NY Armonk
- 代理机构: Hoffman, Warnick & D'Alessandro, LLC
- 代理商 Michael J. LeStrange
- 主分类号: H03L7/00
- IPC分类号: H03L7/00 ; H03L7/099 ; H03B5/18
摘要:
A loop filter for a phase-locked-loop is provided, comprising a set of capacitor banks coupled in parallel to form the loop filter, and a detection circuit for identifying and isolating defective capacitor banks. A method for providing a loop filter for a phase-locked-loop in accordance with an embodiment of the present invention includes the steps of forming the loop filter using a set of capacitor banks coupled in parallel, detecting any defective capacitor banks in the set of capacitor banks, isolating each defective capacitor bank, providing a set of redundant capacitor banks, and replacing each defective capacitor bank with a redundant capacitor bank from the set of redundant capacitor banks.
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