发明授权
- 专利标题： Level shifting input buffer circuit
- 专利标题（中）： 电平移位输入缓冲电路
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申请号： US10964040申请日： 2004-10-13
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公开(公告)号： US07276953B1公开(公告)日： 2007-10-02
- 发明人: Tao Peng , Wen Zhou
- 申请人： Tao Peng , Wen Zhou
- 申请人地址： US CA San Jose
- 专利权人： Cypress Semiconductor Corporation
- 当前专利权人： Cypress Semiconductor Corporation
- 当前专利权人地址： US CA San Jose
- 代理机构： Haverstock & Owens LLP
- 主分类号： H03L5/00
- IPC分类号： H03L5/00
摘要：
An input circuit (200) operating at a predetermined power supply voltage (VPW) can level shift a high voltage input signal (VINHV) from a higher voltage value to the lower power supply voltage (VPW) level. An input circuit (200) can include input transistors (206-0 and 206-1) having a source-follower configuration. A first input transistor (206-0) receives a high voltage input signal (VINHV) and a second input transistor (206-1) receives a reference voltage (VREF), which can both reach levels greater than power supply voltage (VPW). A compare circuit (204) can reduce duty cycle distortion to generate a lower voltage input signal (VINLV). Input circuit (200) can provide level shifting from LVTTL levels to low voltage CMOS levels without the need for multiple power supply voltages.
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