发明授权
- 专利标题: Method of forming interconnect having stacked alignment mark
- 专利标题(中): 形成具有堆叠对准标记的互连的方法
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申请号: US11620057申请日: 2007-01-05
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公开(公告)号: US07288461B2公开(公告)日: 2007-10-30
- 发明人: Wei-Sheng Chia , Chih-Jung Chen , Chung-An Chen , Chih-Chung Huang
- 申请人: Wei-Sheng Chia , Chih-Jung Chen , Chung-An Chen , Chih-Chung Huang
- 申请人地址: TW Hsinchu
- 专利权人: United Microelectronics Corp.
- 当前专利权人: United Microelectronics Corp.
- 当前专利权人地址: TW Hsinchu
- 代理机构: Jianq Chyun IP Office
- 主分类号: H01L21/76
- IPC分类号: H01L21/76
摘要:
A first film layer is formed over a substrate. A portion of the first film layer is removed to form a first alignment mark pattern and a first conductive layer is formed to fill the first alignment mark pattern to form a first alignment mark. A second film layer is formed and a portion of the second film layer is removed to form openings and to form a second alignment mark pattern. A second conductive layer is formed to fill the openings to form first conductive wires and to fill the second alignment mark pattern to form a second alignment mark. A third film layer and a hard mask layer are formed over the second film layer and a portion of the hard mask layer and the third film layer is removed to form via openings. A third conductive layer is formed in the via openings.
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