发明授权
- 专利标题: Method to selectively correct critical dimension errors in the semiconductor industry
- 专利标题(中): 有选择地纠正半导体行业关键尺寸误差的方法
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申请号: US10710602申请日: 2004-07-23
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公开(公告)号: US07294440B2公开(公告)日: 2007-11-13
- 发明人: Jed H. Rankin , Andrew J. Watts
- 申请人: Jed H. Rankin , Andrew J. Watts
- 申请人地址: US NY Armonk
- 专利权人: International Business Machines Corporation
- 当前专利权人: International Business Machines Corporation
- 当前专利权人地址: US NY Armonk
- 代理机构: Schmeiser, Olsen & Watts
- 代理商 William D. Sabo
- 主分类号: G03C5/00
- IPC分类号: G03C5/00 ; H01L21/00 ; H01L21/66 ; G01R31/26
摘要:
A method to correct critical dimension errors during a semiconductor manufacturing process. The method includes providing a first semiconductor device. The first semiconductor device is analyzed to determine at least one critical dimension error within the first semiconductor device. A dose of electron beam exposure to correct the at least one critical dimension error during a subsequent process to form a second semiconductor device, or during modification of the first semiconductor device is determined. The subsequent process comprises providing a semiconductor structure. The semiconductor structure comprises a photoresist layer on a semiconductor substrate. A plurality of features are formed in the photoresist layer. At least one feature of the plurality of features comprises the at least one critical dimension error. The at least one feature comprising the critical dimension error is corrected by exposing the at least one feature to an electron beam comprising the dose of electron beam exposure, resulting in reduction of the size, or shrinkage, of the at least one feature comprising a critical dimension error.