Invention Grant
- Patent Title: Managed memory component
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Application No.: US11436957Application Date: 2006-05-18
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Publication No.: US07304382B2Publication Date: 2007-12-04
- Inventor: James Douglas Wehrly, Jr. , Ron Orris , Leland Szewerenko , Tim Roy , Julian Partridge , David L. Roper
- Applicant: James Douglas Wehrly, Jr. , Ron Orris , Leland Szewerenko , Tim Roy , Julian Partridge , David L. Roper
- Applicant Address: US TX Austin
- Assignee: Staktek Group L.P.
- Current Assignee: Staktek Group L.P.
- Current Assignee Address: US TX Austin
- Agency: Fish & Richardson P.C.
- Agent J. Scott Denko
- Main IPC: H01L23/34
- IPC: H01L23/34

Abstract:
The present invention provides a system and method for combining a leaded package IC and a semiconductor die using a flex circuitry to reduce footprint for the combination. A leaded IC package is disposed along the obverse side of a flex circuit. In a preferred embodiment, leads of the leaded IC package are configured to allow the lower surface of the body of the leaded IC package to contact the surface of the flex circuitry either directly or indirectly through an adhesive. A semiconductor die is connected to the reverse side of the flex circuit. In one embodiment, the semiconductor die is disposed on the reverse side of the flex while, in an alternative embodiment, the semiconductor die is disposed into a window in the flex circuit to rest directly or indirectly upon the body of the leaded IC package. Module contacts are provided in a variety of configurations. In a preferred embodiment, the leaded IC package is a flash memory and the semiconductor die is a controller.
Public/Granted literature
- US20070158800A1 Managed memory component Public/Granted day:2007-07-12
Information query
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