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    Managed memory component
    1.
    发明授权
    Managed memory component 有权
    托管内存组件

    公开(公告)号：US07508069B2

    公开(公告)日：2009-03-24

    申请号：US11436946

    申请日：2006-05-18

    Applicant: James Douglas Wehrly, Jr. ,  Ron Orris ,  Leland Szewerenko ,  Tim Roy ,  Julian Partridge ,  David L. Roper

    Inventor： James Douglas Wehrly, Jr. ,  Ron Orris ,  Leland Szewerenko ,  Tim Roy ,  Julian Partridge ,  David L. Roper

    IPC: H01L23/34

    CPC classification number: H01L25/18 ,  H01L23/5387 ,  H01L25/105 ,  H01L2224/49175 ,  H01L2924/15311 ,  H05K1/147 ,  H05K1/189 ,  H05K3/326 ,  H05K3/3421 ,  H05K3/3436 ,  H05K3/3447 ,  H05K2201/055 ,  H05K2201/091 ,  H05K2201/09463 ,  H05K2201/10515 ,  H05K2201/10689

    Abstract: The present invention provides a system and method for combining a leaded package IC and a semiconductor die using a flex circuitry to reduce footprint for the combination. A leaded IC package is disposed along the obverse side of a flex circuit. In a preferred embodiment, leads of the leaded IC package are configured to allow the lower surface of the body of the leaded IC package to contact the surface of the flex circuitry either directly or indirectly through an adhesive. A semiconductor die is connected to the reverse side of the flex circuit. In one embodiment, the semiconductor die is disposed on the reverse side of the flex while, in an alternative embodiment, the semiconductor die is disposed into a window in the flex circuit to rest directly or indirectly upon the body of the leaded IC package. Module contacts are provided in a variety of configurations. In a preferred embodiment, the leaded IC package is a flash memory and the semiconductor die is a controller.

    Abstract translation: 本发明提供一种用于使用柔性电路组合引线封装IC和半导体管芯以减少组合的覆盖区的系统和方法。 引线IC封装沿柔性电路的正面设置。 在优选实施例中，引线IC封装的引线被配置为允许引线IC封装的主体的下表面通过粘合剂直接或间接地接触柔性电路的表面。 半导体管芯连接到柔性电路的反面。 在一个实施例中，半导体管芯设置在柔性反面的另一侧，而在替代实施例中，将半导体管芯设置在柔性电路中的窗口中，以直接或间接地安置在引线IC封装体上。 模块触点以各种配置提供。 在优选实施例中，引线IC封装是闪存，半导体管芯是控制器。

    Managed memory component
    2.
    发明申请
    Managed memory component 有权
    托管内存组件

    公开(公告)号：US20070158800A1

    公开(公告)日：2007-07-12

    申请号：US11436957

    申请日：2006-05-18

    Applicant: James Wehrly ,  Ron Orris ,  Leland Szewerenko ,  Tim Roy ,  Julian Partridge ,  David Roper

    Inventor： James Wehrly ,  Ron Orris ,  Leland Szewerenko ,  Tim Roy ,  Julian Partridge ,  David Roper

    IPC: H01L23/02

    CPC classification number: H01L23/13 ,  H01L23/5385 ,  H01L23/5387 ,  H01L25/18 ,  H01L2224/49175 ,  H01L2924/15311 ,  H05K1/147 ,  H05K1/182 ,  H05K1/189 ,  H05K3/326 ,  H05K2201/056 ,  H05K2201/091 ,  H05K2201/10515 ,  H05K2201/10689

    Abstract: The present invention provides a system and method for combining a leaded package IC and a semiconductor die using a flex circuitry to reduce footprint for the combination. A leaded IC package is disposed along the obverse side of a flex circuit. In a preferred embodiment, leads of the leaded IC package are configured to allow the lower surface of the body of the leaded IC package to contact the surface of the flex circuitry either directly or indirectly through an adhesive. A semiconductor die is connected to the reverse side of the flex circuit. In one embodiment, the semiconductor die is disposed on the reverse side of the flex while, in an alternative embodiment, the semiconductor die is disposed into a window in the flex circuit to rest directly or indirectly upon the body of the leaded IC package. Module contacts are provided in a variety of configurations. In a preferred embodiment, the leaded IC package is a flash memory and the semiconductor die is a controller.

    Abstract translation: 本发明提供一种用于使用柔性电路组合引线封装IC和半导体管芯以减少组合的覆盖区的系统和方法。 引线IC封装沿柔性电路的正面设置。 在优选实施例中，引线IC封装的引线被配置为允许引线IC封装的主体的下表面通过粘合剂直接或间接地接触柔性电路的表面。 半导体管芯连接到柔性电路的反面。 在一个实施例中，半导体管芯设置在柔性反面的另一侧，而在替代实施例中，将半导体管芯设置在柔性电路中的窗口中，以直接或间接地安置在引线IC封装体上。 模块触点以各种配置提供。 在优选实施例中，引线IC封装是闪存，半导体管芯是控制器。

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