Invention Grant
US07307452B2 Interconnect structure enabling indirect routing in programmable logic
失效
互连结构支持可编程逻辑中的间接路由
- Patent Title: Interconnect structure enabling indirect routing in programmable logic
- Patent Title (中): 互连结构支持可编程逻辑中的间接路由
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Application No.: US11258616Application Date: 2005-10-25
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Publication No.: US07307452B2Publication Date: 2007-12-11
- Inventor: Nitin Deshmukh , Kailash Digari
- Applicant: Nitin Deshmukh , Kailash Digari
- Applicant Address: IN Noida
- Assignee: STMicroelectronics Pvt. Ltd.
- Current Assignee: STMicroelectronics Pvt. Ltd.
- Current Assignee Address: IN Noida
- Agency: Gardere Wynne Sewell LLP
- Priority: IN2111/DEL/2004 20041027
- Main IPC: H01L25/00
- IPC: H01L25/00 ; H03K19/177

Abstract:
An interconnect structure enables indirect routing in programmable logic. The structure includes a plurality of routing lines, and switch box(es) and connection boxes coupled to the plurality of routing lines. The connection boxes include at least one programmable switch in each routing track. The position of the programmable switch(es) in each connection box connected to same interconnect matrix differs from the position of said programmable switch(es) in corresponding routing tracks of other connection boxes thereby utilizing the connectivity of said switch box for input connections and increasing the flexibility of connections.
Public/Granted literature
- US20060139055A1 Interconnect structure enabling indirect routing in programmable logic Public/Granted day:2006-06-29
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