A first adding circuit sums an input image signal of a target pixel and a value that is derived by multiplying respective display errors of three pixels, which are before the target pixel by one line, by weighting factors. A gradation candidate converter converts the gradation of the summed image signal to a plurality of available gradation candidates that are convertible when an error of the immediate left pixel is added. A delaying circuit delays the summed image signal. A second adding circuit sums the delayed image signal and a value that is derived by multiplying the error generated in the immediate left pixel by a weighting factor. A gradation selector selects a gradation closest to the gradation of the image signal to which the error is added from a plurality of gradation candidates, and outputs it as an image signal of the target pixel. A differencing circuit determines a display error of the target pixel.