发明授权
US07312110B2 Methods of fabricating semiconductor devices having thin film transistors
有权
制造具有薄膜晶体管的半导体器件的方法
- 专利标题: Methods of fabricating semiconductor devices having thin film transistors
- 专利标题(中): 制造具有薄膜晶体管的半导体器件的方法
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申请号: US11098648申请日: 2005-04-04
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公开(公告)号: US07312110B2公开(公告)日: 2007-12-25
- 发明人: Kun-Ho Kwak , Sung-Jin Kim , Soon-Moon Jung , Won-Seok Cho , Jae-Hoon Jang , Hoon Lim , Jong-Hyuk Kim , Myang-Sik Han , Byung-Jun Hwang
- 申请人: Kun-Ho Kwak , Sung-Jin Kim , Soon-Moon Jung , Won-Seok Cho , Jae-Hoon Jang , Hoon Lim , Jong-Hyuk Kim , Myang-Sik Han , Byung-Jun Hwang
- 申请人地址: KR
- 专利权人: Samsung Electronics Co., Ltd.
- 当前专利权人: Samsung Electronics Co., Ltd.
- 当前专利权人地址: KR
- 代理机构: Myers Bigel Sibley & Sajovec
- 优先权: KR10-2004-0023548 20040406; KR10-2004-0071884 20040908
- 主分类号: H01L21/00
- IPC分类号: H01L21/00
摘要:
Methods of fabricating semiconductor devices are provided. An interlayer insulating layer is provided on a single crystalline semiconductor substrate. A single crystalline semiconductor plug is provided that extends through the interlayer insulating layer and a molding layer pattern is provided on the semiconductor substrate and the single crystalline semiconductor plug. The molding layer pattern defines an opening therein that at least partially exposes a portion of the single crystalline semiconductor plug. A single crystalline semiconductor epitaxial pattern is provided on the exposed portion of single crystalline semiconductor plug using a selective epitaxial growth technique that uses the exposed portion of the single crystalline semiconductor plug as a seed layer. A single crystalline semiconductor region is provided in the opening. The single crystalline semiconductor region includes at least a portion of the single crystalline semiconductor epitaxial pattern.