发明授权
- 专利标题： Latency normalization by balancing early and late clocks
- 专利标题（中）： 通过平衡早期和晚期时钟的延迟归一化
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申请号： US10949053申请日： 2004-09-24
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公开(公告)号： US07324403B2公开(公告)日： 2008-01-29
- 发明人: Hing Yan To , Joe Salmon , Mamun Ur Rashid
- 申请人： Hing Yan To , Joe Salmon , Mamun Ur Rashid
- 申请人地址： US CA Santa Clara
- 专利权人： Intel Corporation
- 当前专利权人： Intel Corporation
- 当前专利权人地址： US CA Santa Clara
- 代理商 Derek J. Reynolds
- 主分类号： G11C8/18
- IPC分类号： G11C8/18
摘要：
A method, apparatus, and system are disclosed. In one embodiment the method comprises inputting an early clock signal and a late clock signal to a memory device and generating an average clock signal for the memory device by averaging the early clock signal and the late clock signal.
公开/授权文献
- US20060067155A1 Latency normalization by balancing early and late clocks 公开/授权日：2006-03-30
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