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US07345336B2 Semiconductor memory device having self-aligned charge trapping layer
失效
具有自对准电荷捕获层的半导体存储器件
- 专利标题： Semiconductor memory device having self-aligned charge trapping layer
- 专利标题（中）： 具有自对准电荷捕获层的半导体存储器件
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申请号： US11000011申请日： 2004-12-01
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公开(公告)号： US07345336B2公开(公告)日： 2008-03-18
- 发明人: Hee-seog Jeon , Seung-beom Yoon , Yong-tae Kim
- 申请人： Hee-seog Jeon , Seung-beom Yoon , Yong-tae Kim
- 申请人地址： KR Suwon-si, Gyeonggi-do
- 专利权人： Samsung Electronics Co., Ltd.
- 当前专利权人： Samsung Electronics Co., Ltd.
- 当前专利权人地址： KR Suwon-si, Gyeonggi-do
- 代理机构： Volentine & Whitt, PLLC
- 优先权： KR10-2003-0092502 20031217
- 主分类号： H01L29/792
- IPC分类号： H01L29/792
摘要：
A semiconductor memory device having a self-aligned charge trapping layer and a method of manufacturing the same in which a consistent length of an ONO layer is ensured. Here, an insulating stacked structure is self-aligned to a bottom surface of conductive spacers.
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