Invention Grant
US07345336B2 Semiconductor memory device having self-aligned charge trapping layer
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具有自对准电荷捕获层的半导体存储器件
- Patent Title: Semiconductor memory device having self-aligned charge trapping layer
- Patent Title (中): 具有自对准电荷捕获层的半导体存储器件
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Application No.: US11000011Application Date: 2004-12-01
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Publication No.: US07345336B2Publication Date: 2008-03-18
- Inventor: Hee-seog Jeon , Seung-beom Yoon , Yong-tae Kim
- Applicant: Hee-seog Jeon , Seung-beom Yoon , Yong-tae Kim
- Applicant Address: KR Suwon-si, Gyeonggi-do
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Suwon-si, Gyeonggi-do
- Agency: Volentine & Whitt, PLLC
- Priority: KR10-2003-0092502 20031217
- Main IPC: H01L29/792
- IPC: H01L29/792

Abstract:
A semiconductor memory device having a self-aligned charge trapping layer and a method of manufacturing the same in which a consistent length of an ONO layer is ensured. Here, an insulating stacked structure is self-aligned to a bottom surface of conductive spacers.
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