发明授权
- 专利标题: Circuit arrangement for generating switch-on signals
- 专利标题(中): 用于产生接通信号的电路布置
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申请号: US11392351申请日: 2006-03-29
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公开(公告)号: US07352309B2公开(公告)日: 2008-04-01
- 发明人: Dieter Draxelmayr
- 申请人: Dieter Draxelmayr
- 申请人地址: DE Munich
- 专利权人: Infineon Technologies AG
- 当前专利权人: Infineon Technologies AG
- 当前专利权人地址: DE Munich
- 代理机构: Jenkins, Wilson, Taylor & Hunt, P.A.
- 优先权: DE102005015429 20050404
- 主分类号: H03M1/00
- IPC分类号: H03M1/00
摘要:
A circuit arrangement for generating switch-on signals for driving track-and-hold elements of an analog-to-digital converter operating with interleaved timing comprises a first input for inputting a common reference clock signal, at least one window device for generating clock signals which are interleaved with respect to one another in terms of timing and whose respective time windows in which the respective of the clock signals has a first logic level are derived from the reference clock signal, and at least one gate device for generating a switch-on signal. The gate device is connected downstream of the window device and combines logically the reference clock signal with a respective of the clock signals and with a further information item so that a time window of the switch-on signal is at least longer than the window of the reference clock signal.
公开/授权文献
- US20060220695A1 Circuit arrangement for generating switch-on signals 公开/授权日:2006-10-05
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