发明授权
US07352610B1 Volatile memory elements with soft error upset immunity for programmable logic device integrated circuits
有权
具有可编程逻辑器件集成电路的软错误不稳定性的易失性存储元件
- 专利标题: Volatile memory elements with soft error upset immunity for programmable logic device integrated circuits
- 专利标题(中): 具有可编程逻辑器件集成电路的软错误不稳定性的易失性存储元件
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申请号: US11295815申请日: 2005-12-06
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公开(公告)号: US07352610B1公开(公告)日: 2008-04-01
- 发明人: Bruce B. Pedersen , Irfan Rahim , Jeffrey T Watt
- 申请人: Bruce B. Pedersen , Irfan Rahim , Jeffrey T Watt
- 申请人地址: US CA San Jose
- 专利权人: Altera Corporation
- 当前专利权人: Altera Corporation
- 当前专利权人地址: US CA San Jose
- 代理商 G. Victor Treyz
- 主分类号: G11C11/00
- IPC分类号: G11C11/00
摘要:
Memory elements are provided that are immune to soft error upset events when subjected to high-energy atomic particle strikes. The memory elements have nonlinear high-impedance two-terminal elements that restrict the flow of discharge currents during a particle strike. By lengthening the switching speed of the memory elements, the presence of the nonlinear high-impedance two-terminal elements prevents the states of the memory elements from flipping during discharge transients. The nonlinear high-impedance two-terminal elements may be formed from polysilicon p-n junction diodes, Schottky diodes, and other semiconductor structures. Data loading circuitry is provided to ensure that memory element arrays using the nonlinear high-impedance two-terminal elements can be loaded rapidly.
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