发明授权
US07353313B2 General input/output architecture, protocol and related methods to manage data integrity
有权
一般输入/输出架构，协议和相关方法来管理数据完整性
- 专利标题： General input/output architecture, protocol and related methods to manage data integrity
- 专利标题（中）： 一般输入/输出架构，协议和相关方法来管理数据完整性
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申请号： US11585648申请日： 2006-10-23
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公开(公告)号： US07353313B2公开(公告)日： 2008-04-01
- 发明人: Eric R. Wehage , Jasmin Ajanovic , David Harriman , David M. Lee , Blaise Fanning , Buck Gremel , Ken Creta , Wayne Moore
- 申请人： Eric R. Wehage , Jasmin Ajanovic , David Harriman , David M. Lee , Blaise Fanning , Buck Gremel , Ken Creta , Wayne Moore
- 申请人地址： US CA Santa Clara
- 专利权人： Intel Corporation
- 当前专利权人： Intel Corporation
- 当前专利权人地址： US CA Santa Clara
- 主分类号： G06F13/14
- IPC分类号： G06F13/14
摘要：
An enhanced general input/output (EGIO) communication architecture, protocol and related methods are presented. The elements of an EGIO architecture may include one or more of a root complex (e.g., implemented within a bridge), a switch, and end-points, each incorporating at least a subset of EGIO features to support EGIO communication between such elements.
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