Invention Grant
- Patent Title: Methods and arrangements for reducing partial discharges on printed circuit boards
- Patent Title (中): 减少印刷电路板局部放电的方法和布置
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Application No.: US10888472Application Date: 2004-07-09
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Publication No.: US07355832B2Publication Date: 2008-04-08
- Inventor: Senthil Kumar Sundaram , Rohini Krishnamoorthy , Cariappa Achappa Baduvamanda
- Applicant: Senthil Kumar Sundaram , Rohini Krishnamoorthy , Cariappa Achappa Baduvamanda
- Applicant Address: US NY Schenectady
- Assignee: General Electric Company
- Current Assignee: General Electric Company
- Current Assignee Address: US NY Schenectady
- Agency: Armstrong Teasdale LLP
- Main IPC: H02H3/22
- IPC: H02H3/22
Abstract:
Methods and arrangements for reducing partial discharges on a printed circuit board are provided. A method of reducing partial discharge in a printed circuit board includes providing a conducting surface coupled to a component under at least one of electrical and thermal stress, wherein the conducting surface is a metallic plate.
Public/Granted literature
- US20060007624A1 Methods and arrangements for reducing partial discharges on printed circuit boards Public/Granted day:2006-01-12
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