Invention Grant
US07364942B2 Process for wafer level treatment to reduce stiction and passivate micromachined surfaces and compounds used therefor
有权
用于晶片级处理以减少静摩擦和钝化微加工表面和用于其的化合物的方法
- Patent Title: Process for wafer level treatment to reduce stiction and passivate micromachined surfaces and compounds used therefor
- Patent Title (中): 用于晶片级处理以减少静摩擦和钝化微加工表面和用于其的化合物的方法
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Application No.: US11786515Application Date: 2007-04-12
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Publication No.: US07364942B2Publication Date: 2008-04-29
- Inventor: John R. Martin
- Applicant: John R. Martin
- Applicant Address: US MA Norwood
- Assignee: Analog Devices, Inc.
- Current Assignee: Analog Devices, Inc.
- Current Assignee Address: US MA Norwood
- Agency: Weingarten, Schurgin, Gagnebin & Lebovici LLP
- Main IPC: H01L21/00
- IPC: H01L21/00
Abstract:
This invention discloses a process for forming durable anti-stiction surfaces on micromachined structures while they are still in wafer form (i.e., before they are separated into discrete devices for assembly into packages). This process involves the vapor deposition of a material to create a low stiction surface. It also discloses chemicals which are effective in imparting an anti-stiction property to the chip. These include polyphenylsiloxanes, silanol terminated phenylsiloxanes and similar materials.
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