发明授权
- 专利标题: Mechanism for avoiding check stops in speculative accesses while operating in real mode
- 专利标题(中): 在实模式下运行时避免检测停止的机制
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申请号: US10424527申请日: 2003-04-25
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公开(公告)号: US07370177B2公开(公告)日: 2008-05-06
- 发明人: Ronald N. Kalla , Cathy May , Balaram Sinharoy , Edward John Silha , Shih-Hsiung S. Tung
- 申请人: Ronald N. Kalla , Cathy May , Balaram Sinharoy , Edward John Silha , Shih-Hsiung S. Tung
- 申请人地址: US NY Armonk
- 专利权人: International Business Machines Corporation
- 当前专利权人: International Business Machines Corporation
- 当前专利权人地址: US NY Armonk
- 代理机构: Winstead PC
- 代理商 Casimer K. Salys; Robert A. Voigt, Jr.
- 主分类号: G06F9/30
- IPC分类号: G06F9/30
摘要:
A method and processor for avoiding check stops in speculative accesses. An execution unit, e.g., load/store unit, may be coupled to a queue configured to store instructions. A register, coupled to the execution unit, may be configured to store a value corresponding to an address in physical memory. When the processor is operating in real mode, the execution unit may retrieve the value stored in the register. Upon the execution unit receiving a speculative instruction, e.g., speculative load instruction, from the queue, a determination may be made as to whether the address of the speculative instruction is at or below the retrieved value. If the address of the speculative instruction is at or below this value, then the execution unit may safely speculatively execute this instruction while avoiding a check stop since all the addresses at or below this value are known to exist in physical memory.
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