发明授权
- 专利标题: Selective incorporation of charge for transistor channels
- 专利标题(中): 选择性地并入晶体管通道的电荷
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申请号: US11346662申请日: 2006-02-03
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公开(公告)号: US07374998B2公开(公告)日: 2008-05-20
- 发明人: John Michael Hergenrother , Zhibin Ren , Dinkar Virendra Singh , Jeffrey William Sleight
- 申请人: John Michael Hergenrother , Zhibin Ren , Dinkar Virendra Singh , Jeffrey William Sleight
- 申请人地址: US NY Armonk
- 专利权人: International Business Machines Corporation
- 当前专利权人: International Business Machines Corporation
- 当前专利权人地址: US NY Armonk
- 代理机构: Keusey, Tutunjian & Bitetto, P.C.
- 主分类号: H01L21/336
- IPC分类号: H01L21/336
摘要:
A device and method for selective placement of charge into a gate stack includes forming gate stacks including a gate dielectric adjacent to a transistor channel and a gate conductor and forming doped regions for transistor operation. A layer rich in a passivating element is deposited over the doped regions and the gate stack, and the layer rich the passivating element is removed from selected transistors. The layer rich in the passivating element is than annealed to drive-in the passivating element to increase a concentration of charge at or near transistor channels on transistors where the layer rich in the passivating element is present. The layer rich in the passivating element is removed.
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