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公开(公告)号：US20080217682A1
公开(公告)日：2008-09-11
申请号：US12121858
申请日：2008-05-16
IPC分类号： H01L49/00
CPC分类号： H01L21/28097 , H01L21/26506 , H01L21/28185 , H01L21/7624 , H01L29/4975 , H01L29/518 , H01L29/6659 , H01L29/7833
摘要： A device and method for selective placement of charge into a gate stack includes forming gate stacks including a gate dielectric adjacent to a transistor channel and a gate conductor and forming doped regions for transistor operation. A layer rich in a passivating element is deposited over the doped regions and the gate stack, and the layer rich the passivating element is removed from selected transistors. The layer rich in the passivating element is than annealed to drive-in the passivating element to increase a concentration of charge at or near transistor channels on transistors where the layer rich in the passivating element is present. The layer rich in the passivating element is removed.
摘要翻译： 用于选择性地将电荷放置到栅极堆叠中的器件和方法包括形成包括邻近晶体管沟道和栅极导体的栅极电介质的栅极堆叠，并形成用于晶体管操作的掺杂区域。 在掺杂区域和栅极叠层上沉积富含钝化元素的层，并且从所选择的晶体管去除富含钝化元件的层。 富含钝化元件的层比退火以驱动钝化元件，以增加在存在钝化元件的层的晶体管上的晶体管沟槽处或附近的电荷浓度。 去除富含钝化元素的层。
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公开(公告)号：US07687863B2
公开(公告)日：2010-03-30
申请号：US12121858
申请日：2008-05-16
IPC分类号： H01L23/62
CPC分类号： H01L21/28097 , H01L21/26506 , H01L21/28185 , H01L21/7624 , H01L29/4975 , H01L29/518 , H01L29/6659 , H01L29/7833
摘要： A device and method for selective placement of charge into a gate stack includes forming gate stacks including a gate dielectric adjacent to a transistor channel and a gate conductor and forming doped regions for transistor operation. A layer rich in a passivating element is deposited over the doped regions and the gate stack, and the layer rich the passivating element is removed from selected transistors. The layer rich in the passivating element is than annealed to drive-in the passivating element to increase a concentration of charge at or near transistor channels on transistors where the layer rich in the passivating element is present. The layer rich in the passivating element is removed.
摘要翻译： 用于选择性地将电荷放置到栅极堆叠中的器件和方法包括形成包括邻近晶体管沟道和栅极导体的栅极电介质的栅极堆叠，并形成用于晶体管操作的掺杂区域。 在掺杂区域和栅极叠层上沉积富含钝化元素的层，并且从所选择的晶体管去除富含钝化元件的层。 富含钝化元件的层比退火以驱动钝化元件，以增加在存在钝化元件的层的晶体管上的晶体管沟槽处或附近的电荷浓度。 去除富含钝化元素的层。
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公开(公告)号：US07374998B2
公开(公告)日：2008-05-20
申请号：US11346662
申请日：2006-02-03
IPC分类号： H01L21/336
CPC分类号： H01L21/28097 , H01L21/26506 , H01L21/28185 , H01L21/7624 , H01L29/4975 , H01L29/518 , H01L29/6659 , H01L29/7833
摘要： A device and method for selective placement of charge into a gate stack includes forming gate stacks including a gate dielectric adjacent to a transistor channel and a gate conductor and forming doped regions for transistor operation. A layer rich in a passivating element is deposited over the doped regions and the gate stack, and the layer rich the passivating element is removed from selected transistors. The layer rich in the passivating element is than annealed to drive-in the passivating element to increase a concentration of charge at or near transistor channels on transistors where the layer rich in the passivating element is present. The layer rich in the passivating element is removed.
摘要翻译： 用于选择性地将电荷放置到栅极堆叠中的器件和方法包括形成包括邻近晶体管沟道和栅极导体的栅极电介质的栅极堆叠，并形成用于晶体管操作的掺杂区域。 在掺杂区域和栅极叠层上沉积富含钝化元素的层，并且从所选择的晶体管去除富含钝化元件的层。 富含钝化元件的层比退火以驱动钝化元件，以增加在存在钝化元件的层的晶体管上的晶体管沟槽处或附近的电荷浓度。 去除富含钝化元素的层。
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