发明授权
US07376872B1 Testing embedded memory in integrated circuits such as programmable logic devices
有权
在可编程逻辑器件等集成电路中测试嵌入式存储器
- 专利标题: Testing embedded memory in integrated circuits such as programmable logic devices
- 专利标题(中): 在可编程逻辑器件等集成电路中测试嵌入式存储器
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申请号: US10978899申请日: 2004-11-01
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公开(公告)号: US07376872B1公开(公告)日: 2008-05-20
- 发明人: Michael Nelson , Robert Feather , Hemanshu Vernenker
- 申请人: Michael Nelson , Robert Feather , Hemanshu Vernenker
- 申请人地址: US OR Hillsboro
- 专利权人: Lattice Semiconductor Corporation
- 当前专利权人: Lattice Semiconductor Corporation
- 当前专利权人地址: US OR Hillsboro
- 主分类号: G11C29/00
- IPC分类号: G11C29/00 ; G01R31/28
摘要:
Method and apparatus for the testing of embedded memories in integrated circuits such as programmable logic devices are disclosed. In conjunction with a partial BIST engine, an external tester provides the embedded memories with test vectors. The on-chip partial BIST engine retrieves the test vectors from the embedded memories and compares them to corresponding expected test vectors supplied by the external tester. Based upon the comparison, the on-chip partial BIST engine forms comparison results indicating whether the retrieved test vectors differ from the corresponding expected test vectors. For programmable logic devices, a full BIST engine may be configured in the integrated circuit for generating the test vectors on chip.
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