发明授权
- 专利标题： Integrated stress relief pattern and registration structure
- 专利标题（中）： 综合应力消除模式和注册结构
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申请号： US11695665申请日： 2007-04-03
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公开(公告)号： US07378720B2公开(公告)日： 2008-05-27
- 发明人: Chung-min Fu , Huang-Sheng Lin , Yu-Chyi Harn , Hsien-Wei Chen
- 申请人： Chung-min Fu , Huang-Sheng Lin , Yu-Chyi Harn , Hsien-Wei Chen
- 申请人地址： TW Hsin-Chu
- 专利权人： Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人： Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人地址： TW Hsin-Chu
- 代理机构： Haynes Boone, LLP
- 主分类号： H01L23/544
- IPC分类号： H01L23/544 ; H01L23/48 ; H01L23/52 ; H01L29/40
摘要：
A semiconductor die having an integrated circuit region formed in a substrate comprises at least one die-corner-circuit-forbidden (DCCF) region disposed in the substrate, proximate to the integrated circuit region; and at least one registration feature formed within the at least one DCCF region. The at least one registration feature comprises a structure selected from the group consisting of a laser fuse mark, an alignment mark, and a monitor mark.
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