发明授权
- 专利标题: Method for isolating silicon germanium dislocation regions in strained-silicon CMOS applications
- 专利标题(中): 在应变硅CMOS应用中分离硅锗位错区的方法
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申请号: US11073185申请日: 2005-03-03
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公开(公告)号: US07384837B2公开(公告)日: 2008-06-10
- 发明人: Sheng Teng Hsu , Jong-Jan Lee , Douglas J. Tweet , Jer-shen Maa
- 申请人: Sheng Teng Hsu , Jong-Jan Lee , Douglas J. Tweet , Jer-shen Maa
- 申请人地址: US WA Camas
- 专利权人: Sharp Laboratories of America, Inc.
- 当前专利权人: Sharp Laboratories of America, Inc.
- 当前专利权人地址: US WA Camas
- 代理机构: Law Office of Gerald Maliszewski
- 代理商 Gerald Maliszewski
- 主分类号: H01L21/8238
- IPC分类号: H01L21/8238
摘要:
A dual gate strained-Si MOSFET with thin SiGe dislocation regions and a method for fabricating the same are provided. The method forms a first layer of relaxed SiGe overlying a substrate, having a thickness of less than 5000 Å; forms a second layer of relaxed SiGe overlying the substrate and adjacent to the first layer of SiGe, having a thickness of less than 5000 Å; forms a layer of strained-Si overlying the first and second SiGe layers; forms a shallow trench isolation region interposed between the first SiGe layer and the second SiGe layer; forms an p-well in the substrate and the overlying first layer of SiGe; forming forms a p-well in the substrate and the overlying second layer of SiGe; forms channel regions, in the strained-Si, and forms PMOS and NMOS transistor source and drain regions.
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