公开(公告)号：US09559358B2

公开(公告)日：2017-01-31

申请号：US13449195

申请日：2012-04-17

申请人： Yuhao Lu ,  Jong-Jan Lee ,  Motoaki Nishijima ,  Seizoh Kakimoto

发明人： Yuhao Lu ,  Jong-Jan Lee ,  Motoaki Nishijima ,  Seizoh Kakimoto

IPC分类号： H01M4/58 ,  H01M4/04 ,  H01M4/136 ,  H01M4/587 ,  H01M4/139 ,  H01M4/02 ,  H01M10/36 ,  H01M10/054

CPC分类号： H01M4/58 ,  H01M4/0404 ,  H01M4/0438 ,  H01M4/0445 ,  H01M4/0459 ,  H01M4/136 ,  H01M4/139 ,  H01M4/587 ,  H01M10/054 ,  H01M10/36 ,  H01M2004/028 ,  Y02E60/122

摘要： A battery structure is provided for making alkali ion and alkaline-earth ion batteries. The battery has a hexacyanometallate cathode, a non-metal anode, and non-aqueous electrolyte. A method is provided for forming the hexacyanometallate battery cathode and non-metal battery anode prior to the battery assembly. The cathode includes hexacyanometallate particles overlying a current collector. The hexacyanometallate particles have the chemical formula A′n′AmM1xM2y(CN)6, and have a Prussian Blue hexacyanometallate crystal structure.

摘要翻译： 提供用于制造碱性离子和碱土离子电池的电池结构。 电池具有六金属金属阴极，非金属阳极和非水电解质。 提供了一种用于在电池组装之前形成六氰基金属盐电池阴极和非金属电池阳极的方法。 阴极包括覆盖集电器的六氰基金属盐颗粒。 六氰基金属盐颗粒具有化学式A'n'AmM1xM2y（CN）6，并具有普鲁士蓝六氰基金属酸盐晶体结构。

公开(公告)号：US20140134792A1

公开(公告)日：2014-05-15

申请号：US13719052

申请日：2012-12-18

申请人： Sean Andrew Vail ,  Alexey Koposov ,  Wei Pan ,  Gary D. Foley ,  Jong-Jan Lee

发明人： Sean Andrew Vail ,  Alexey Koposov ,  Wei Pan ,  Gary D. Foley ,  Jong-Jan Lee

IPC分类号： H01L21/02

CPC分类号： H01L21/02628 ,  H01L21/02491 ,  H01L21/02568 ,  H01L21/02614 ,  H01L31/0322 ,  Y02E10/541

摘要： Methods are provided for fabricating a solution-processed metal and mixed-metal selenide semiconductor using a selenium (Se) film layer. One aspect provides a conductive substrate and deposits a first Se film layer over the conductive substrate. A first solution, including a first material set of metal salts, metal complexes, or combinations thereof, is dissolved in a solvent and deposited on the first Se film layer. A first intermediate film comprising metal precursors is formed from corresponding members of the first material set. In one aspect, a plurality of intermediate films is formed using metal precursors from the first material set or a different material set. In another aspect, a second Se film layer is formed overlying the intermediate film(s). Thermal annealing is performed in an environment including hydrogen (H2), hydrogen selenide (H2Se), or Se/H2. The metal precursors are transformed in the intermediate film(s), and a metal selenide-containing semiconductor is formed.

摘要翻译： 提供了使用硒（Se）膜层制造溶液处理金属和混合金属硒化物半导体的方法。 一个方面提供一种导电衬底并且在导电衬底上沉积第一Se膜层。 包括金属盐，金属络合物或其组合的第一材料组合的第一溶液溶解在溶剂中并沉积在第一Se膜层上。 包含金属前体的第一中间膜由第一材料组的相应构件形成。 在一个方面，使用来自第一材料组或不同材料组的金属前体形成多个中间膜。 在另一方面，形成覆盖中间膜的第二Se膜层。 在包括氢（H 2），硒化氢（H 2 Se）或Se / H 2的环境中进行热退火。 金属前体在中间膜中转变，形成含金属硒化物的半导体。

公开(公告)号：US20140116509A1

公开(公告)日：2014-05-01

申请号：US13664256

申请日：2012-10-30

申请人： Sean Andrew Vail ,  Alexey Koposov ,  Wei Pan ,  Gary D. Foley ,  Jong-Jan Lee

发明人： Sean Andrew Vail ,  Alexey Koposov ,  Wei Pan ,  Gary D. Foley ,  Jong-Jan Lee

IPC分类号： H01L51/00 ,  H01B1/12

CPC分类号： H01L51/4226 ,  H01L51/002 ,  H01L51/0058 ,  Y02E10/549

摘要： A solid-state hole transport composite material (ssHTM) is provided. The ssHTM is made from a neutral charge first p-type organic semiconductor, and a chemically oxidized first p-type semiconductor, where the dopants are silver(I) containing materials. A reduced form of the silver(I) containing material is also retained as functional component in the ssHTM. In one aspect, the silver(I) containing material is silver bis(trifluoromethanesulfonyl)imide (TFSI). In another aspect, the first p-type organic semiconductor is 2,2′,7,7′-tetrakis(N,N-di-p-methoxyphenylamine)-9,9′-spirobifluorene (Spiro-OMeTAD). In one variation, the ssHTM additionally includes a first p-type organic semiconductor doped with an ionic dopant such as lithium (Li+), sodium (Na+), potassium (K+), or combinations of the above-mentioned materials. Also provided are a method for synthesizing the above-described ssHTM, and a solid-state dye solar cell (ssDSC) fabricated from the ssHTM.

摘要翻译： 提供固态空穴传输复合材料（ssHTM）。 ssHTM由中性电荷第一p型有机半导体和化学氧化的第一p型半导体制成，其中掺杂剂是含银（I）的材料。 含有银（I）的材料的还原形式也作为ssHTM中的功能组分保留。 一方面，含有银（I）的材料是双（三氟甲磺酰）酰亚胺（TFSI）。 另一方面，第一p型有机半导体是2,2'，7,7'-四（N，N-二 - 对甲氧基苯胺）-9,9'-螺二芴（Spiro-OMeTAD）。 在一个实施方案中，ssHTM还包括掺杂有离子掺杂剂如锂（Li +），钠（Na +），钾（K +）或上述材料的组合的第一p型有机半导体。 还提供了合成上述ssHTM的方法和由ssHTM制造的固态染料太阳能电池（ssDSC）。

公开(公告)号：US20130260222A1

公开(公告)日：2013-10-03

申请号：US13432993

申请日：2012-03-28

申请人： Yuhao Lu ,  Jong-Jan Lee

发明人： Yuhao Lu ,  Jong-Jan Lee

IPC分类号： H01M4/38 ,  H01M4/02 ,  H01M4/40 ,  H01M4/58 ,  H01M10/02

CPC分类号： H01M4/58 ,  H01M4/0404 ,  H01M4/0438 ,  H01M4/0445 ,  H01M4/0459 ,  H01M4/139 ,  H01M4/587 ,  H01M10/054

摘要： A method is provided for forming a metal-ion battery electrode with large interstitial spacing. A working electrode with hexacyanometallate particles overlies a current collector. The hexacyanometallate particles have a chemical formula AmM1xM2y(CN)6·zH2O, and have a Prussian Blue hexacyanometallate crystal structure, where A is either alkali or alkaline-earth cations. M1 and M2 are metals with 2+ or 3+ valance positions. The working electrode is soaked in an organic first electrolyte including a salt including alkali or alkaline earth cations. A first electric field is created in the first electrolyte between the working electrode and a first counter electrode, causing A cations and water molecules to he simultaneously removed from interstitial spaces in the Prussian Blue hexacyanometallate crystal structure, forming hexacyanometallate particles having the chemical formula of Am′mM1xM2y(CN)6·z′H2O, where m′

摘要翻译： 提供一种用于形成具有大间隙间距的金属离子电池电极的方法。 具有六氰基金属酸盐颗粒的工作电极覆盖集电器。 六氰基金属盐颗粒具有化学式AmM1xM2y（CN）6·zH2O，并具有普鲁士蓝六氰基金属酸盐晶体结构，其中A为碱金属或碱土金属阳离子。 M1和M2是具有2+或3+价位的金属。 将工作电极浸渍在包含碱​​金属或碱土金属阳离子的盐的有机第一电解质中。 在工作电极和第一对电极之间的第一电解质中产生第一电场，使得阳离子和水分子同时从普鲁士蓝六氰基金属酸盐晶体结构中的间隙中除去，形成化学式为Am的六氰基金属盐颗粒 'mM1xM2y（CN）6·z'H2O，其中m'

公开(公告)号：US20120211063A1

公开(公告)日：2012-08-23

申请号：US13215279

申请日：2011-08-23

申请人： Jong-Jan Lee ,  Paul J. Schuele

发明人： Jong-Jan Lee ,  Paul J. Schuele

IPC分类号： H01L31/0352 ,  H01L51/46

CPC分类号： H01L31/022441 ,  B82Y10/00 ,  B82Y30/00 ,  H01L31/0747 ,  H01L31/075 ,  H01L31/1804 ,  H01L51/0036 ,  H01L51/0037 ,  H01L51/0047 ,  H01L51/4213 ,  H01L51/4293 ,  Y02E10/547 ,  Y02E10/548 ,  Y02E10/549 ,  Y02P70/521

摘要： A back contact solar cell with organic semiconductor heterojunctions is provided. The substrate is made from silicon lightly doped with a first dopant type having a first majority carrier. A second semiconductor layer is formed overlying the texturized substrate topside, made from hydrogenated amorphous silicon (a-Si:H) and doped with the first dopant. An antireflective coating is formed overlying the second semiconductor layer. A third semiconductor layer is formed overlying the first semiconductor substrate backside, made from intrinsic a-Si:H. First and second majority carrier type organic semiconductor layers are formed overlying the third semiconductor layer in patterns. A dielectric organic semiconductor layer is formed overlying the first majority carrier type organic semiconductor layer and the second majority carrier type organic semiconductor layer, filling the spaces in the pattern. A first metal grid is connected to first organic semiconductor contact regions and a second metal grid is connected to the second organic semiconductor contact regions.

摘要翻译： 提供了具有有机半导体异质结的背接触太阳能电池。 衬底由具有第一多数载流子的第一掺杂剂类型的轻掺杂硅制成。 形成第二半导体层，覆盖由氢化非晶硅（a-Si：H）制成并掺杂有第一掺杂剂的纹理化衬底顶层。 形成覆盖第二半导体层的抗反射涂层。 第三半导体层形成在由固有a-Si：H制成的第一半导体衬底背面上。 第一和第二多数载流子型有机半导体层以图案形成在第三半导体层上。 在第一多数载流子型有机半导体层和第二多数载流子型有机半导体层上形成绝缘有机半导体层，填充图案中的空间。 第一金属网格连接到第一有机半导体接触区域，第二金属栅极连接到第二有机半导体接触区域。

公开(公告)号：US20100276776A1

公开(公告)日：2010-11-04

申请号：US12434118

申请日：2009-05-01

申请人： Jong-Jan Lee ,  Steven R. Droes ,  John W. Hartzell ,  Jer-Shen Maa

发明人： Jong-Jan Lee ,  Steven R. Droes ,  John W. Hartzell ,  Jer-Shen Maa

IPC分类号： H01L31/028 ,  H01L21/02 ,  H01L31/0216

CPC分类号： H01L27/14618 ,  H01L27/14634 ,  H01L27/14636 ,  H01L27/14689 ,  H01L27/1469 ,  H01L2224/0554 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2924/00014 ,  H01L2924/351 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： A germanium (Ge) photodiode array on a glass substrate is provided with a corresponding fabrication method. A Ge substrate is provided that is either not doped or lightly doped with a first dopant. The first dopant can be either an n or p type dopant. A first surface of the Ge substrate is moderately doped with the first dopant and bonded to a glass substrate top surface. Then, a first region of a Ge substrate second surface is heavily doped with the first dopant. A second region of the Ge substrate second surface is heavily doped with a second dopant, having the opposite electron affinity than the first dopant, forming a pn junction. An interlevel dielectric (ILD) layer is formed overlying the Ge substrate second surface and contact holes are etched in the ILD layer overlying the first and second regions of the Ge substrate second surface. The contact holes are filled with metal and metal pads are formed overlying the contact holes.

摘要翻译： 玻璃基板上的锗（Ge）光电二极管阵列具有相应的制造方法。 提供未掺杂或轻掺杂第一掺杂剂的Ge衬底。 第一掺杂剂可以是n型或p型掺杂剂。 Ge衬底的第一表面适度地掺杂有第一掺杂剂并且结合到玻璃衬底顶表面。 然后，Ge衬底第二表面的第一区域被第一掺杂剂重掺杂。 Ge衬底第二表面的第二区域重掺杂有与第一掺杂剂相反的电子亲和力的第二掺杂剂，形成pn结。 在Ge衬底第二表面上形成层间电介质（ILD）层，并且在覆盖Ge衬底第二表面的第一和第二区域的ILD层中蚀刻接触孔。 接触孔填充有金属，并且金属垫形成在接触孔上。

公开(公告)号：US07800148B2

公开(公告)日：2010-09-21

申请号：US12178169

申请日：2008-07-23

申请人： Jong-Jan Lee ,  Sheng Teng Hsu ,  Douglas James Tweet ,  Jer-Shen Maa

发明人： Jong-Jan Lee ,  Sheng Teng Hsu ,  Douglas James Tweet ,  Jer-Shen Maa

IPC分类号： H01L31/062

CPC分类号： H01L27/14647

摘要： A CMOS active pixel sensor includes a silicon-on-insulator substrate having a silicon substrate with an insulator layer formed thereon and a top silicon layer formed on the insulator layer. A stacked pixel sensor cell includes a bottom photodiode fabricated on the silicon substrate, for sensing light of a longest wavelength; a middle photodiode fabricated on the silicon substrate, for sensing light of a medium wavelength, which is stacked above the bottom photodiode; and a top photodiode fabricated on the top silicon layer, for sensing light of a shorter wavelength, which is stacked above the middle and bottom photodiodes. Pixel transistor sets are fabricated on the top silicon layer and are associated with each pixel sensor cell by electrical connections which extend between each of the photodiodes and respective pixel transistor(s). CMOS control circuitry is fabricated adjacent to an array of active pixel sensor cells and electrically connected thereto.

摘要翻译： CMOS有源像素传感器包括具有在其上形成有绝缘体层的硅衬底和形成在绝缘体层上的顶部硅层的绝缘体上硅衬底。 层叠像素传感器单元包括：制造在硅衬底上的底部光电二极管，用于感测最长波长的光; 制造在硅衬底上的中间光电二极管，用于感测中等波长的光; 和制造在顶部硅层上的顶部光电二极管，用于感测较短波长的光，该光被层叠在中间和底部光电二极管的上方。 像素晶体管组被制造在顶部硅层上，并且通过在每个光电二极管和相应的像素晶体管之间延伸的电连接与每个像素传感器单元相关联。 CMOS控制电路与有源像素传感器单元的阵列相邻并且与其电连接。

公开(公告)号：US07625787B2

公开(公告)日：2009-12-01

申请号：US11897691

申请日：2007-08-31

申请人： Jong-Jan Lee ,  Sheng Teng Hsu

发明人： Jong-Jan Lee ,  Sheng Teng Hsu

IPC分类号： H01L21/00

CPC分类号： H01L29/78615 ,  H01L29/063 ,  H01L29/0696 ,  H01L29/1083 ,  H01L29/402 ,  H01L29/66689 ,  H01L29/7824 ,  H01L29/78624

摘要： A silicon (Si)-on-insulator (SOI) high voltage transistor with a body ground is provided with an associated fabrication process. The method provides a SOI substrate with a buried oxide (BOX) layer and a Si top layer having a first thickness and a second thickness, greater than the first thickness. A body ground is formed in the second thickness of Si top layer overlying the BOX layer. A control channel is formed in the first thickness of the Si top layer. A control gate is formed overlying the control channel. An auxiliary channel is formed in the second thickness of Si top layer partially overlying the body ground and extending into the first thickness of the Si top layer. An auxiliary gate is formed overlying the auxiliary channel. A pn junction is formed in the second thickness of Si top layer between the auxiliary channel and the body ground.

公开(公告)号：US20090219410A1

公开(公告)日：2009-09-03

申请号：US12039706

申请日：2008-02-28

申请人： Sheng Teng Hsu ,  Jong-Jan Lee

发明人： Sheng Teng Hsu ,  Jong-Jan Lee

IPC分类号： H04N5/235

CPC分类号： H04N5/3597 ,  H04N5/363

摘要： A complementary metal oxide semiconductor (CMOS) imager flush reset circuit is provided. The flush reset circuit has an interface to receive first (e.g., VDD) and second (e.g., ground) reference voltages. The flush reset circuit has a solitary (flush) signal interface. There is also an interface connected to a transistor set power interface to supply a Vflush1 signal at least one threshold voltage different than the second reference voltage, in response to receiving a flush signal. The flush signal is used to create a CMOS imager hard reset prior to a soft reset.

摘要翻译： 提供了互补金属氧化物半导体（CMOS）成像器冲洗复位电路。 闪光复位电路具有接收第一（例如VDD）和第二（例如，接地）参考电压的接口。 冲洗复位电路具有独立（齐平）信号接口。 响应于接收到刷新信号，还存在连接到晶体管集电源接口的接口，以向Vflush1信号提供不同于第二参考电压的至少一个阈值电压。 刷新信号用于在软复位之前创建CMOS成像器硬复位。

公开(公告)号：US20090200584A1

公开(公告)日：2009-08-13

申请号：US12029431

申请日：2008-02-11

申请人： Douglas J. Tweet ,  Jong-Jan LEE

发明人： Douglas J. Tweet ,  Jong-Jan LEE

IPC分类号： H01L31/02

CPC分类号： H01L27/14647 ,  H01L27/14621 ,  H01L27/14641 ,  H01L27/14645

摘要： A full color complementary metal oxide semiconductor (CMOS) imaging circuit is provided. The imaging circuit comprises an array of photodiodes including a plurality of pixel groups. Each pixel group supplies 3 electrical color signals, corresponding to 3 detectable colors. The circuit also includes a color filter array overlying the photodiode array employing less than 3 separate filter colors. Each pixel group may be enabled as a dual-pixel including a single photodiode (PD) to supply a first color signal and stacked PDs to supply a second and third color signal. In one aspect, the color filter array employs 1 filter color per pixel group. In another aspect, the color filter array employees 2 filter colors per pixel group. In either aspect, the color filter array forms a checkerboard pattern of color filter pixels. For example, a magenta color filter may overlie the stacked PDs of each dual-pixel, to name one variation.

摘要翻译： 提供全彩互补金属氧化物半导体（CMOS）成像电路。 成像电路包括包括多个像素组的光电二极管阵列。 每个像素组提供3种电气色彩信号，对应于3种可检测的颜色。 该电路还包括一个覆盖光电二极管阵列的彩色滤光片阵列，采用少于3个独立的滤色器。 每个像素组可以被启用为包括单个光电二极管（PD）的双像素，以提供第一颜色信号和堆叠的PD以提供第二和第三颜色信号。 在一个方面，滤色器阵列每像素组使用1个滤色器。 在另一方面，滤色器阵列每个像素组有2个滤色器。 在任一方面，滤色器阵列形成滤色器像素的棋盘图案。 例如，品红色滤色器可以覆盖每个双像素的堆叠的PD，以命名一个变体。