发明授权
US07414430B2 Programmable logic device having an embedded differential clock tree
有权
具有嵌入式差分时钟树的可编程逻辑器件
- 专利标题： Programmable logic device having an embedded differential clock tree
- 专利标题（中）： 具有嵌入式差分时钟树的可编程逻辑器件
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申请号： US11511647申请日： 2006-08-29
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公开(公告)号： US07414430B2公开(公告)日： 2008-08-19
- 发明人: Vasisht Mantra Vadi , Steven P. Young , Atul V. Ghia , Adebabay M. Bekele , Suresh M. Menon
- 申请人： Vasisht Mantra Vadi , Steven P. Young , Atul V. Ghia , Adebabay M. Bekele , Suresh M. Menon
- 申请人地址： US CA San Jose
- 专利权人： Xilinx, Inc.
- 当前专利权人： Xilinx, Inc.
- 当前专利权人地址： US CA San Jose
- 代理商 Michael Wallace
- 主分类号： H03K19/177
- IPC分类号： H03K19/177
摘要：
A clock distribution network having: a backbone clock signal line configured to provide a differential clock signal; multiple branches coupled to the backbone clock signal line for distributing the differential clock signal to multiple programmable function elements; a first leaf node coupled to a first branch, where the first leaf node is configured to provide the differential clock signal to a first programmable function element; and a second leaf node coupled to a second branch, where the second leaf node is configured to provide a single ended clock signal derived from the differential clock signal to a second programmable function element.
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