- 专利标题: LDPMOS structure with enhanced breakdown voltage
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申请号: US11646683申请日: 2006-12-28
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公开(公告)号: US07423319B2公开(公告)日: 2008-09-09
- 发明人: Robin Hsieh , Tsai Chun Lin , Albert Yao , Pai-Kang Hsu , Tsung-Yi Huang , Ruey-Hsin Liu
- 申请人: Robin Hsieh , Tsai Chun Lin , Albert Yao , Pai-Kang Hsu , Tsung-Yi Huang , Ruey-Hsin Liu
- 申请人地址: TW Hsin-Chu
- 专利权人: Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人: Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人地址: TW Hsin-Chu
- 代理机构: Slater & Matsil, L.L.P.
- 主分类号: H01L29/78
- IPC分类号: H01L29/78
摘要:
A semiconductor structure includes a first well region of a first conductivity type overlying a substrate, a second well region of a second conductivity type opposite the first conductivity type overlying the substrate and laterally adjoining the first well region, a third well region of the second conductivity type adjacent and spaced apart from the first well region, a first deep well region of the second conductivity type underlying at least portions of the first and the second well regions, a second deep well region of the second conductivity type underlying the third well region and spaced apart from the first deep well region, an insulation region in the first well region, a gate dielectric extending from over the insulation region to over the second well region, and a gate electrode on the gate dielectric.
公开/授权文献
- US20080157197A1 LDPMOS structure with enhanced breakdown voltage 公开/授权日:2008-07-03