发明授权
- 专利标题: Method for performing full-chip manufacturing reliability checking and correction
- 专利标题(中): 执行全芯片制造可靠性检查和校正的方法
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申请号: US11225888申请日: 2005-09-14
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公开(公告)号: US07434195B2公开(公告)日: 2008-10-07
- 发明人: Michael Hsu , Thomas Laidig , Kurt E. Wampler , Duan-Fu Stephen Hsu , Xuelong Shi
- 申请人: Michael Hsu , Thomas Laidig , Kurt E. Wampler , Duan-Fu Stephen Hsu , Xuelong Shi
- 申请人地址: NL Veldhoven
- 专利权人: ASML Masktools B.V.
- 当前专利权人: ASML Masktools B.V.
- 当前专利权人地址: NL Veldhoven
- 代理机构: Pillsbury Winthrop et al.
- 主分类号: G06F17/50
- IPC分类号: G06F17/50 ; G06K9/00 ; G03F1/00
摘要:
A method of generating a mask for use in an imaging process pattern. The method includes the steps of: (a) obtaining a desired target pattern having a plurality of features to be imaged on a substrate; (b) simulating a wafer image utilizing the target pattern and process parameters associated with a defined process; (c) defining at least one feature category; (d) identifying features in the target pattern that correspond to the at least one feature category, and recording an error value for each feature identified as corresponding to the at least one feature category; and (e) generating a statistical summary which indicates the error value for each feature identified as corresponding to the at least one feature category.
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