发明授权
- 专利标题: Chip package without core and stacked chip package structure thereof
- 专利标题(中): 无芯芯片封装和堆叠芯片封装结构
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申请号: US11302736申请日: 2005-12-13
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公开(公告)号: US07436074B2公开(公告)日: 2008-10-14
- 发明人: Yu-Tang Pan , Cheng-Ting Wu , Shih-Wen Chou , Hui-Ping Liu
- 申请人: Yu-Tang Pan , Cheng-Ting Wu , Shih-Wen Chou , Hui-Ping Liu
- 申请人地址: TW Hsinchu BM Hamilton
- 专利权人: ChipMOS Technologies Inc.,ChipMOS Technologies (Bermuda) Ltd.
- 当前专利权人: ChipMOS Technologies Inc.,ChipMOS Technologies (Bermuda) Ltd.
- 当前专利权人地址: TW Hsinchu BM Hamilton
- 代理机构: J. C. Patents
- 优先权: TW94123850A 20050714
- 主分类号: H01L23/48
- IPC分类号: H01L23/48 ; H01L23/52
摘要:
A chip package without a core, including a patterned circuit layer, a chip, a solder mask, a molding compound and multiple outer terminals, is provided. The patterned circuit layer has a first surface and a second surface opposite to each other. The chip disposed on the first surface is electrically connected to the patterned circuit layer. The solder mask disposed on the second surface has a plurality of first openings by which part of the patterned circuit layer is exposed. The molding compound with a plurality of through holes cover the pattern circuit layer and fix the chip onto the patterned circuit layer. Each outer terminal disposed in the through hole is electrically connected to the patterned circuit layer.