Invention Grant
- Patent Title: Manufacturing method for semiconductor device to mitigate short channel effects
- Patent Title (中): 半导体器件的制造方法,以减轻短路效应
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Application No.: US11600030Application Date: 2006-11-16
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Publication No.: US07449386B2Publication Date: 2008-11-11
- Inventor: Chung-Te Lin , Di-Houng Lee , Yee-Chaung See
- Applicant: Chung-Te Lin , Di-Houng Lee , Yee-Chaung See
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Finnegan, Henderson, Farabow, Garrett & Dunner LLP
- Main IPC: H01L21/336
- IPC: H01L21/336

Abstract:
A method of manufacturing a plurality of MOS transistors includes forming gate structures in first and second regions on a substrate and forming mask portions only between adjacent drain sides of the respective gate structures only in the first region. Dopant of a first conductivity type that is the same as that of the substrate, is implanted at first and second angles in both the first and second regions to form halo regions only in source sides under the gate structures in the first region and in both source and drain sides under the gate structures in the second region.
Public/Granted literature
- US20080119023A1 Manufacturing method for semiconductor device to mitigate short channel effects Public/Granted day:2008-05-22
Information query
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