Invention Grant
- Patent Title: Atomic implantation and thermal treatment of a semiconductor layer
- Patent Title (中): 半导体层的原子注入和热处理
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Application No.: US11179713Application Date: 2005-07-11
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Publication No.: US07449394B2Publication Date: 2008-11-11
- Inventor: Takeshi Akatsu , Nicolas Daval , Nguyet-Phuong Nguyen , Olivier Rayssac , Konstantin Bourdelle
- Applicant: Takeshi Akatsu , Nicolas Daval , Nguyet-Phuong Nguyen , Olivier Rayssac , Konstantin Bourdelle
- Applicant Address: FR Bernin
- Assignee: S.O.I.Tec Silicon on Insulator Technologies
- Current Assignee: S.O.I.Tec Silicon on Insulator Technologies
- Current Assignee Address: FR Bernin
- Agency: Winston & Strawn LLP
- Priority: FR0402340 20040305; FR0409980 20040921
- Main IPC: H01L21/46
- IPC: H01L21/46

Abstract:
Methods for forming a semiconductor structure are described. In an embodiment, the technique includes providing a donor wafer having a first semiconductor layer and a second semiconductor layer on the first layer and having a free surface; coimplanting two different atomic species through the free surface of the second layer to form a zone of weakness zone in the first layer; bonding the free surface of the second layer to a host wafer; and supplying energy to detach at the zone of weakness a semiconductor structure comprising the host wafer, the second layer and a portion of the first layer. Advantageously, the donor wafer includes a SiGe layer, and the co-implantation of atomic species is conducted according to implantation parameters adapted to enable a first species to form the zone of weakness in the SiGe layer, and to enable a second species to provide a concentration peak located beneath the zone of weakness in the donor wafer to thus minimize surface roughness resulting from detachment at the zone of weakness.
Public/Granted literature
- US20050245049A1 Atomic implantation and thermal treatment of a semiconductor layer Public/Granted day:2005-11-03
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