The amplifier includes first and second inverters that form a flip-flop. In this flip-flop, an input of first inverter is connected to an output of the second inverter, and an output of the first inverter is connected to an input of the second inverter. Control terminals of at least one transistors (MN1, MN2) of first and second transistor pairs (MP1, MN1 and MP2, MN2) that constitute first and second inverters, respectively, are connected to inputs of first and second inverters through first and second capacitances (C1, C2), respectively. At resetting, inputs (1, 2) and outputs (OUT, OUTB) of first and second inverters are not mutually cross-connected, wherein a reference signal (VR) is supplied in common to inputs (1, 2) of the first and second inverters. The one transistors (MN1, MN2) are diode-connected. Voltage differences between reference signal (VR) and respective control terminals of the one transistors are stored in the first and second capacitances (C1, C2), respectively. At signal input, diode connections of the one transistors (MN1, MN2) are released. Inputs (1, 2) of the first and second inverters are disconnected from the reference signal. First and second input signals (S1, S2) are supplied to inputs (1, 2), respectively. Then, inputs and outputs of first and second inverters are mutually cross-connected, forming the flip-flop. The amplifier with high-speed and highly reliable operation does not depend on variations in devices therein.