公开(公告)号：US20070205807A1

公开(公告)日：2007-09-06

申请号：US11680669

申请日：2007-03-01

申请人： Hiroshi Tsuchi ,  Osamu Ishibashi

发明人： Hiroshi Tsuchi ,  Osamu Ishibashi

IPC分类号： G01R19/00

CPC分类号： G11C7/065 ,  G11C7/08

摘要： The amplifier includes first and second inverters that form a flip-flop. In this flip-flop, an input of first inverter is connected to an output of the second inverter, and an output of the first inverter is connected to an input of the second inverter. Control terminals of at least one transistors (MN1, MN2) of first and second transistor pairs (MP1, MN1 and MP2, MN2) that constitute first and second inverters, respectively, are connected to inputs of first and second inverters through first and second capacitances (C1, C2), respectively. At resetting, inputs (1, 2) and outputs (OUT, OUTB) of first and second inverters are not mutually cross-connected, wherein a reference signal (VR) is supplied in common to inputs (1, 2) of the first and second inverters. The one transistors (MN1, MN2) are diode-connected. Voltage differences between reference signal (VR) and respective control terminals of the one transistors are stored in the first and second capacitances (C1, C2), respectively. At signal input, diode connections of the one transistors (MN1, MN2) are released. Inputs (1, 2) of the first and second inverters are disconnected from the reference signal. First and second input signals (S1, S2) are supplied to inputs (1, 2), respectively. Then, inputs and outputs of first and second inverters are mutually cross-connected, forming the flip-flop. The amplifier with high-speed and highly reliable operation does not depend on variations in devices therein.

摘要翻译： 放大器包括形成触发器的第一和第二反相器。 在该触发器中，第一反相器的输入连接到第二反相器的输出端，第一反相器的输出端连接到第二反相器的输入。 构成第一和第二反相器的第一和第二晶体管对（MP 1，MN 1和MP 2，MN 2）的至少一个晶体管（MN 1，MN 2）的控制端分别连接到第一和第二 逆变器分别通过第一和第二电容（C 1，C 2）。 在复位时，第一和第二反相器的输入（1,2）和输出（OUT，OUTB）不互相交叉，其中参考信号（VR）被共同提供给第一和第二反相器的输入（1,2） 第二台逆变器。 一个晶体管（MN 1，MN 2）是二极管连接的。 参考信号（VR）和一个晶体管的各控制端之间的电压差分别存储在第一和第二电容（C 1，C 2）中。 在信号输入端，一个晶体管（MN 1，MN 2）的二极管连接被释放。 第一和第二逆变器的输入（1,2）与参考信号断开。 第一和第二输入信号（S1，S2）分别被提供给输入（1,2）。 然后，第一和第二反相器的输入和输出相互交叉连接，形成触发器。 具有高速和高可靠运行的放大器不依赖于其中的器件的变化。

公开(公告)号：US07482843B2

公开(公告)日：2009-01-27

申请号：US11680669

申请日：2007-03-01

申请人： Hiroshi Tsuchi ,  Osamu Ishibashi

发明人： Hiroshi Tsuchi ,  Osamu Ishibashi

IPC分类号： H03F3/45

CPC分类号： G11C7/065 ,  G11C7/08

摘要： The amplifier includes first and second inverters that form a flip-flop. In this flip-flop, an input of first inverter is connected to an output of the second inverter, and an output of the first inverter is connected to an input of the second inverter. Control terminals of at least one transistors (MN1, MN2) of first and second transistor pairs (MP1, MN1 and MP2, MN2) that constitute first and second inverters, respectively, are connected to inputs of first and second inverters through first and second capacitances (C1, C2), respectively. At resetting, inputs (1, 2) and outputs (OUT, OUTB) of first and second inverters are not mutually cross-connected, wherein a reference signal (VR) is supplied in common to inputs (1, 2) of the first and second inverters. The one transistors (MN1, MN2) are diode-connected. Voltage differences between reference signal (VR) and respective control terminals of the one transistors are stored in the first and second capacitances (C1, C2), respectively. At signal input, diode connections of the one transistors (MN1, MN2) are released. Inputs (1, 2) of the first and second inverters are disconnected from the reference signal. First and second input signals (S1, S2) are supplied to inputs (1, 2), respectively. Then, inputs and outputs of first and second inverters are mutually cross-connected, forming the flip-flop. The amplifier with high-speed and highly reliable operation does not depend on variations in devices therein.

摘要翻译： 放大器包括形成触发器的第一和第二反相器。 在该触发器中，第一反相器的输入连接到第二反相器的输出端，第一反相器的输出端连接到第二反相器的输入。 构成第一和第二反相器的第一和第二晶体管对（MP1，MN1和MP2，MN2）的至少一个晶体管（MN1，MN2）的控制端分别通过第一和第二电容连接到第一和第二反相器的输入端 （C1，C2）。 在复位时，第一和第二反相器的输入（1,2）和输出（OUT，OUTB）不互相交叉，其中参考信号（VR）被共同提供给第一和第二反相器的输入（1,2） 第二台逆变器。 一个晶体管（MN1，MN2）是二极管连接的。 参考信号（VR）与一个晶体管的各个控制端子之间的电压差分别存储在第一和第二电容（C1，C2）中。 在信号输入端，一个晶体管（MN1，MN2）的二极管连接被释放。 第一和第二逆变器的输入（1,2）与参考信号断开。 第一和第二输入信号（S1，S2）分别被提供给输入（1,2）。 然后，第一和第二反相器的输入和输出相互交叉连接，形成触发器。 具有高速和高可靠运行的放大器不依赖于其中的器件的变化。

公开(公告)号：US09140967B2

公开(公告)日：2015-09-22

申请号：US14001860

申请日：2012-03-02

申请人： Kazuhiko Aoki ,  Masahiko Ohta ,  So Nishimura ,  Yoshiho Yanagita ,  Osamu Ishibashi ,  Fujio Okumura

发明人： Kazuhiko Aoki ,  Masahiko Ohta ,  So Nishimura ,  Yoshiho Yanagita ,  Osamu Ishibashi ,  Fujio Okumura

IPC分类号： G03B21/14 ,  G09G3/02 ,  H04N9/31 ,  G03B21/60 ,  G03B21/56

CPC分类号： G03B21/14 ,  G03B21/56 ,  G03B21/60 ,  G03B2206/00 ,  G09G3/02 ,  H04N9/3129

摘要： A projection screen includes: phosphor regions arranged cyclically in an in-plane direction of a display region; a plurality of black stripes and reference black stripes that partition the display region into the phosphor regions; and an optical information formation unit that is provided in a specific position within the display region and that generates readable optical information.

摘要翻译： 投影屏幕包括：在显示区域的面内方向上循环布置的荧光体区域; 将显示区域划分为荧光体区域的多个黑条纹和参考黑条纹; 以及光学信息形成单元，其设置在所述显示区域内的特定位置，并且生成可读光学信息。

公开(公告)号：US08738976B2

公开(公告)日：2014-05-27

申请号：US13163606

申请日：2011-06-17

申请人： Rikizo Nakano ,  Osamu Ishibashi ,  Sadao Miyazaki

发明人： Rikizo Nakano ,  Osamu Ishibashi ,  Sadao Miyazaki

IPC分类号： G11C29/00

CPC分类号： G11C29/44 ,  G11C5/00 ,  G11C5/04 ,  G11C29/56 ,  G11C2029/4002

摘要： A memory error detecting apparatus for detecting an error of a subject memory, the memory error detecting apparatus includes a memory bus connected to the subject memory, a mirror memory connected to the memory bus so as to receive the same data as data to be written into and read from the subject memory, the received data being written into the mirror memory, an address acquiring portion configured to acquire an address related to the data written into the subject memory, a mirror memory controller configured to control data writing or reading to or from the mirror memory on the basis of the acquired address, a comparator configured to compare data read from the subject memory and data read from the mirror memory, and an error detector configured to detect a data error on the basis of a result of the comparison.

摘要翻译： 一种用于检测对象存储器的错误的存储器错误检测装置，所述存储器错误检测装置包括连接到所述对象存储器的存储器总线，连接到所述存储器总线的镜像存储器，以便接收与要写入的数据相同的数据 从所述主体存储器读取所接收的数据被写入所述镜像存储器，地址获取部分，被配置为获取与写入所述对象存储器的数据相关的地址;镜像存储器控制器，被配置为控制数据写入或读取; 基于所获取的地址的镜像存储器，比较器，被配置为比较从所述对象存储器读取的数据和从所述镜像存储器读取的数据;以及错误检测器，被配置为基于所述比较的结果来检测数据错误。

公开(公告)号：US08495463B2

公开(公告)日：2013-07-23

申请号：US12725893

申请日：2010-03-17

申请人： Sadao Miyazaki ,  Osamu Ishibashi ,  Rikizo Nakano

发明人： Sadao Miyazaki ,  Osamu Ishibashi ,  Rikizo Nakano

IPC分类号： G11C29/00

CPC分类号： G11C29/44 ,  G11C5/04 ,  G11C29/4401 ,  G11C29/76 ,  G11C2029/0407 ,  G11C2029/1208

摘要： A memory control device is provided. The memory control device is configured to control access to a storage device including a plurality of storage areas. The memory control device includes a defect detecting unit configured to detect a defective area of a storage area into which data may not be stored. The memory control device also includes a storage processing unit configured to store defect information including address information of the defective area detected using the defect detecting unit into a memory area. A data writing unit is also included in the memory control device. The data writing unit is configured to write data, which has been written into the defective area, into a storage area other than the storage area comprising the defective area based on the defect information stored using the storage processing unit.

摘要翻译： 提供存储器控制装置。 存储器控制装置被配置为控制对包括多个存储区域的存储装置的访问。 存储器控制装置包括：缺陷检测单元，被配置为检测可能不存储数据的存储区域的缺陷区域。 存储器控制装置还包括：存储处理单元，被配置为将包括使用缺陷检测单元检测到的缺陷区域的地址信息的缺陷信息存储到存储区域中。 数据写入单元也包括在存储器控制装置中。 数据写入单元被配置为基于使用存储处理单元存储的缺陷信息将已写入缺陷区域的数据写入除了包括缺陷区域的存储区域之外的存储区域中。

公开(公告)号：US08400703B2

公开(公告)日：2013-03-19

申请号：US12663398

申请日：2008-06-18

申请人： Eiji Akiyama ,  Fujio Okumura ,  Osamu Ishibashi

发明人： Eiji Akiyama ,  Fujio Okumura ,  Osamu Ishibashi

IPC分类号： G02B26/00 ,  G02F1/01 ,  G02F1/03 ,  G02F1/07

CPC分类号： G02F1/29 ,  G02F1/292 ,  G02F2201/122 ,  G02F2202/20

摘要： An optical switch for switching between transmission and total reflection of incident light 101 applied to electro-optical crystal 104 by applying an electric field to electro-optical crystal 104 to thereby change the refractive index of electro-optical crystal 104 includes a plurality of electrodes 105 disposed in electro-optical crystal 104 to provide electrode assembly 106 for applying the electric field to electro-optical crystal 104. Electro-optical crystal 104 has a refractive index changing portion (not shown) whose refractive index is changed by the electric field applied by electrode assembly 106, the refractive index changing portion enclosing electrode assembly 106 in its entirety. The refractive index changing portion has a flat refractive index boundary.

摘要翻译： 用于通过向电光晶体104施加电场以改变电光晶体104的折射率而将施加到电光晶体104的入射光101的透射和全反射之间切换的光开关包括多个电极105 设置在电光晶体104中以提供用于将电场施加到电光晶体104的电极组件106.电光晶体104具有折射率变化部分（未示出），其折射率由施加的电场的折射率改变 电极组件106，整体折射率变化部分包围电极组件106。 折射率变化部分具有平坦的折射率边界。

公开(公告)号：US20120254663A1

公开(公告)日：2012-10-04

申请号：US13430766

申请日：2012-03-27

申请人： Rikizo Nakano ,  Osamu Ishibashi ,  Sadao Miyazaki

发明人： Rikizo Nakano ,  Osamu Ishibashi ,  Sadao Miyazaki

IPC分类号： G06F11/263

CPC分类号： G11C29/50012 ,  G01R31/3187 ,  G11C29/00 ,  G11C29/02 ,  G11C29/04 ,  G11C29/08 ,  G11C29/12 ,  G11C29/1201 ,  G11C29/14 ,  H04L25/0278

摘要： A semiconductor memory device is disclosed that includes an ODT circuit configured to be connected to a bus which transmits a data signal or a data strobe signal between a memory block and an input-output terminal; a first switch configured to be inserted into the bus between the memory block and the ODT circuit; a mode controller configured to switch off the first switch during a test of the memory block; and an oscillator configured to be connected to the ODT circuit, wherein a test signal is supplied to the ODT circuit from the oscillator during the test of the memory block.

摘要翻译： 公开了一种半导体存储器件，其包括被配置为连接到在存储器块和输入 - 输出端子之间传输数据信号或数据选通信号的总线的ODT电路; 第一开关，被配置为插入到所述存储器块和所述ODT电路之间的总线中; 模式控制器，被配置为在所述存储器块的测试期间关闭所述第一开关; 以及配置为连接到ODT电路的振荡器，其中在存储器块的测试期间将测试信号从振荡器提供给ODT电路。

公开(公告)号：US20110255148A1

公开(公告)日：2011-10-20

申请号：US13140965

申请日：2009-12-16

申请人： Masahiko Ohta ,  Osamu Ishibashi ,  Fujio Okumura

发明人： Masahiko Ohta ,  Osamu Ishibashi ,  Fujio Okumura

IPC分类号： G02F1/29

CPC分类号： G02F1/315 ,  G02F1/0305 ,  G02F1/0316 ,  G02F2203/21

摘要： An optical switch changes the refractive index of an electro-optical crystal according to an electric field applied to the electro-optical crystal so as to switch depending on whether the electro-optical crystal enables incident light to pass through or whether the electro-optical crystal enables incident light to be totally reflected. The optical switch includes an electrode section including a plurality of electrodes and formed in the electro-optical crystal, a principal plane including the largest area of each electrode on a same plane of the electro-optical crystal; an insulator layer on at least one plane of the electro-optical crystal, the plane being parallel with the electrode section, the insulator layer made of an insulator with lower dielectric constant than the electro-optical crystal; and a temperature control device formed on and in contact with the insulator layer and controls a temperature of the electrode section or dissipates heat generated in the electrode section.

摘要翻译： 光开关根据施加到电光晶体的电场来改变电光晶体的折射率，以根据电光晶体是否使入射光通过，或者电光晶体 使入射光完全反射。 该光开关包括：电极部分，包括多个电极并形成在电光晶体中，包括在电光晶体的同一平面上的每个电极的最大面积的主平面; 在所述电光晶体的至少一个平面上的绝缘体层，所述平面与所述电极部分平行，所述绝缘体层由具有比所述电光晶体低的介电常数的绝缘体制成; 以及形成在绝缘体层上并与绝缘体接触的温度控制装置，并且控制电极部分的温度或散发在电极部分中产生的热量。

公开(公告)号：US20110194078A1

公开(公告)日：2011-08-11

申请号：US13064767

申请日：2011-04-13

申请人： Kazuhiro Nishida ,  Osamu Ishibashi

发明人： Kazuhiro Nishida ,  Osamu Ishibashi

IPC分类号： G03B21/14

CPC分类号： H04N9/3167 ,  G03B21/14 ,  G03B21/2073 ,  G03B21/208 ,  H04N9/3152

摘要： A projector having a first lens array with a plurality of first lenses in a plane substantially orthogonal to an optical axis of the light beam from a light source that divides the light beam into a plurality of partial light beams, a second lens array having a plurality of second lenses corresponding to the plurality of first lenses, and a polarization converter that is disposed on a light beam emitting-side of the first lens array. A focal position in a first direction of the first lens is set in the vicinity of the second lens array in the optical direction of the light beam irradiated from the first lens. A focal position in the second direction of the first lens is set in the vicinity of the polarization converter in the optical direction of the light beam irradiated from the first lens.

公开(公告)号：US07292806B2

公开(公告)日：2007-11-06

申请号：US11067482

申请日：2005-02-25

申请人： Keiichi Taguchi ,  Ken Yoshizuka ,  Osamu Ishibashi

发明人： Keiichi Taguchi ,  Ken Yoshizuka ,  Osamu Ishibashi

IPC分类号： G03G21/00

CPC分类号： G03G15/01 ,  G03G15/00 ,  G03G2215/0177

摘要： Prior to the execution of a printing operation, a print preparatory operation is conducted only on a priority developer cartridge out of the plurality of monochromatic developer cartridges mounted to the developing unit thereby bringing the cartridge into a printable state. Therefore, the print preparatory operation is completed when the print preparatory operation on one (equivalent to a “priority cartridge” of the invention) of the developer cartridges mounted to the developing unit is terminated. Hence, the apparatus may be placed in the printable state in a short time so that the print preparatory operation is prevented from compelling a user to wait needlessly long and that waiting time of a user may be shortened.

摘要翻译： 在执行打印操作之前，仅在安装到显影单元上的多个单色显影剂盒中的优先显影剂盒上进行打印准备操作，从而使盒进入可打印状态。 因此，当安装到显影单元的显影剂盒的一个（相当于本发明的“优先盒”）的打印准备操作终止时，打印准备操作完成。 因此，可以在短时间内将该装置置于可打印状态，从而防止打印准备操作强迫用户等待不必要的长时间，并且可缩短用户的等待时间。