发明授权
- 专利标题： Handling address translations and exceptions of a heterogeneous resource of a processor using another processor resource
- 专利标题（中）： 使用另一个处理器资源处理处理器异构资源的地址转换和异常
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申请号： US11477643申请日： 2006-06-29
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公开(公告)号： US07487341B2公开(公告)日： 2009-02-03
- 发明人: Hong Wang , Hong Jiang , John Shen , Porus S. Khajotia , Ming W. Choy , Narayan Biswal
- 申请人： Hong Wang , Hong Jiang , John Shen , Porus S. Khajotia , Ming W. Choy , Narayan Biswal
- 申请人地址： US CA Santa Clara
- 专利权人： Intel Corporation
- 当前专利权人： Intel Corporation
- 当前专利权人地址： US CA Santa Clara
- 代理机构： Trop, Pruner & Hu, P.C.
- 主分类号： G06F9/00
- IPC分类号： G06F9/00 ; G06F12/10
摘要：
In one embodiment, the present invention includes a method for communicating a request for handling of a fault or exception occurring in an accelerator to a first instruction sequencer coupled thereto. The accelerator may be a heterogeneous resource with respect to the first instruction sequencer, e.g., of a different instruction set architecture. Responsive to the request, the fault or exception may be handled in the first instruction sequencer. Other embodiments are described and claimed.
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