发明授权
US07488668B2 Manufacturing method for semiconductor devices, arrangement determination method and apparatus for semiconductor device formation regions, and program for determining arrangement of semiconductor device formation regions
失效
用于半导体器件的制造方法，用于半导体器件形成区域的布置确定方法和装置以及用于确定半导体器件形成区域的布置的程序
- 专利标题： Manufacturing method for semiconductor devices, arrangement determination method and apparatus for semiconductor device formation regions, and program for determining arrangement of semiconductor device formation regions
- 专利标题（中）： 用于半导体器件的制造方法，用于半导体器件形成区域的布置确定方法和装置以及用于确定半导体器件形成区域的布置的程序
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申请号： US11183739申请日： 2005-07-19
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公开(公告)号： US07488668B2公开(公告)日： 2009-02-10
- 发明人: Kiyoshi Arita , Hiroshi Haji , Kazuhiro Noda , Akira Nakagawa , Teruaki Nishinaka
- 申请人： Kiyoshi Arita , Hiroshi Haji , Kazuhiro Noda , Akira Nakagawa , Teruaki Nishinaka
- 申请人地址： JP Osaka
- 专利权人： Panasonic Corporation
- 当前专利权人： Panasonic Corporation
- 当前专利权人地址： JP Osaka
- 代理机构： Wenderoth, Lind & Ponack, L.L.P.
- 优先权： JP2004-215364 20040723
- 主分类号： H01L21/00
- IPC分类号： H01L21/00 ; H01L23/544
摘要：
With use of a length-dimension of a second-line-segment of a unit-device-formation-region as an arrangement interval, a plurality of parallel lines are disposed in a device-formation-effective-region on a wafer so as to form a plurality of parallel-line-partition-regions, the unit-device-formation-regions are arranged in each of the parallel-line-partition-regions independently of and separately from other parallel-line-partition-regions so that the acquisition number of the unit-device-formation-regions is maximized, and an arrangement of the respective unit-device-formation-regions in the respective parallel-line-partition-regions is determined as an arrangement of the entire device-formation-effective-region.
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