Invention Grant
- Patent Title: Stacking system and method
- Patent Title (中): 堆叠系统和方法
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Application No.: US11197267Application Date: 2005-08-04
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Publication No.: US07495334B2Publication Date: 2009-02-24
- Inventor: Russell Rapport , James W. Cady , James Wilder , David L. Roper , James Douglas Wehrly, Jr. , Jeff Buchle , Julian Dowden
- Applicant: Russell Rapport , James W. Cady , James Wilder , David L. Roper , James Douglas Wehrly, Jr. , Jeff Buchle , Julian Dowden
- Applicant Address: US TX Austin
- Assignee: Entorian Technologies, LP
- Current Assignee: Entorian Technologies, LP
- Current Assignee Address: US TX Austin
- Agency: Fish & Richardson P.C.
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L23/52 ; H01L29/40

Abstract:
The present invention stacks chip scale-packaged integrated circuits (CSPs) into modules that conserve PWB or other board surface area. In a two-high CSP stack or module devised in accordance with a preferred embodiment of the present invention, two CSPs are stacked, with one CSP disposed above the other. The two CSPs are connected with flex circuitry. A form standard is disposed between the flex circuitry and a CSP in the stack. The form standard can take many configurations and may be used where flex circuits are used to connect CSPs to one another in stacked modules having two or more constituent CSPs. For example, in stacked modules that include four CSPs, three form standards are employed in preferred embodiments, although fewer may be used. The form standard provides a thermally conductive physical form that allows many of the varying package sizes found in the broad family of CSP packages to be used to advantage while employing a standard connective flex circuitry design.
Public/Granted literature
- US20050280135A1 Stacking system and method Public/Granted day:2005-12-22
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