发明授权
- 专利标题： Semiconductor memory device and manufacturing method of the same
- 专利标题（中）： 半导体存储器件及其制造方法
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申请号： US11902996申请日： 2007-09-27
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公开(公告)号： US07498207B2公开(公告)日： 2009-03-03
- 发明人: Masakazu Hirose , Fukashi Morishita
- 申请人： Masakazu Hirose , Fukashi Morishita
- 申请人地址： JP Tokyo
- 专利权人： Renesas Technology Corp.
- 当前专利权人： Renesas Technology Corp.
- 当前专利权人地址： JP Tokyo
- 代理机构： McDermott Will & Emery LLP
- 优先权： JP2001-293174 20010926
- 主分类号： H01L21/00
- IPC分类号： H01L21/00 ; H01L21/84
摘要：
In this semiconductor memory device, a potential clamping region having no insulation layer formed therein is provided in an insulation layer. More specifically, the potential clamping region is formed under a body portion at a position near a first impurity region, and extends to a first semiconductor layer. A body fixing portion is formed in a boundary region between the body portion and the potential clamping region. This structure enables improvement in operation performance without increasing the layout area in the case where a DRAM cell is formed in a SOI (Silicon On Insulator) structure.
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