发明授权
- 专利标题: Semiconductor multilayer wiring board and method of forming the same
- 专利标题(中): 半导体多层线路板及其形成方法
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申请号: US10965868申请日: 2004-10-18
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公开(公告)号: US07498520B2公开(公告)日: 2009-03-03
- 发明人: Tetsuya Osaka , Tokihiko Yokoshima , Isao Sato , Akira Hashimoto , Yoshio Hagiwara
- 申请人: Tetsuya Osaka , Tokihiko Yokoshima , Isao Sato , Akira Hashimoto , Yoshio Hagiwara
- 申请人地址: JP Tokyo JP Kanagawa Prefecture
- 专利权人: Waseda University,Tokyo Ohka Kogyo Co., Ltd.
- 当前专利权人: Waseda University,Tokyo Ohka Kogyo Co., Ltd.
- 当前专利权人地址: JP Tokyo JP Kanagawa Prefecture
- 代理机构: Wenderoth, Lind & Ponack, L.L.P.
- 优先权: JP2003-358433 20031017; JP2004-265445 20040913
- 主分类号: H05K3/02
- IPC分类号: H05K3/02 ; H05K1/00
摘要:
A silica-based interlayer insulating layer having a low dielectric constant is formed with SOG material on a substrate, in which a wiring-layer forming space is then formed. If necessary, a UV ray irradiation is performed under an oxidizing atmosphere. A Si—OH bond is formed on a surface of the insulating layer. A monomolecular layer film is then adhered to the inner surface of the space, which is then modified to be a catalyst with a solution containing Pd compound. On the catalyst monomolecular layer, a copper-diffusion-resistant film is formed by electroless plating, on which a copper plate is then formed as a wiring layer.
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