Invention Grant
- Patent Title: Switch circuit and integrated circuit
- Patent Title (中): 开关电路和集成电路
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Application No.: US11362506Application Date: 2006-02-27
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Publication No.: US07511592B2Publication Date: 2009-03-31
- Inventor: Yusuke Inoue
- Applicant: Yusuke Inoue
- Applicant Address: JP Kawasaki
- Assignee: Fujitsu Limited
- Current Assignee: Fujitsu Limited
- Current Assignee Address: JP Kawasaki
- Agency: Arent Fox LLP
- Priority: JP2005-287721 20050930
- Main IPC: H01P1/15
- IPC: H01P1/15

Abstract:
A switch circuit includes a balanced line connected between one end of an unbalanced line having another end connected to an input terminal and an output terminal and a balanced line connected between the one end of the unbalanced line and an output terminal. On each of the balanced lines, a plurality of quarter-wave transmission lines are connected in cascade, and each of a plurality of FETs, whose impedance is controllable, is connected between one pair of transmission lines constituting a balanced line for each interconnection point between the transmission lines, so that the power of a signal is distributed to both of the pair of transmission lines, and therefore the inputted power becomes half on each balanced line, thereby making it possible to prevent a DC-like current from flowing when the FET is in an off state even if a high frequency signal with high power is inputted.
Public/Granted literature
- US20070075589A1 Switch circuit and integrated circuit Public/Granted day:2007-04-05
Information query