Invention Grant
US07516307B2 Processor for computing a packed sum of absolute differences and packed multiply-add
有权
用于计算绝对差异和压缩乘积的压缩和的处理器
- Patent Title: Processor for computing a packed sum of absolute differences and packed multiply-add
- Patent Title (中): 用于计算绝对差异和压缩乘积的压缩和的处理器
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Application No.: US10005728Application Date: 2001-11-06
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Publication No.: US07516307B2Publication Date: 2009-04-07
- Inventor: Mohammad A. Abdallah , Vladimir Pentkovski
- Applicant: Mohammad A. Abdallah , Vladimir Pentkovski
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agent Lawrence M. Mennemeier
- Main IPC: G06F9/22
- IPC: G06F9/22 ; G06F9/302

Abstract:
A method and apparatus is disclosed that computes multiple absolute differences from packed data and sums each one of the multiple absolute differences together to produce a result. According to one embodiment, a processor includes a decode unit to decode a packed sum of absolute differences (PSAD) instruction having an opcode format to identify a set of packed data operands. The decode unit initiates a sequence of operations on the set of packed data operands in response to decoding the PSAD instruction. An execution unit performs a first operation of the sequence of operations initiated by the decode logic, and a bus provides the execution unit with the set of packed data operands as identified in accordance with the opcode format.
Public/Granted literature
- US20020062331A1 A METHOD AND APPARATUS FOR COMPUTING A PACKED SUM OF ABSOLUTE DIFFERENCES Public/Granted day:2002-05-23
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