发明授权
US07521776B2 Soft error reduction of CMOS circuits on substrates with hybrid crystal orientation using buried recombination centers 有权
使用掩埋复合中心的具有混合晶体取向的衬底上的CMOS电路的软误差降低

Soft error reduction of CMOS circuits on substrates with hybrid crystal orientation using buried recombination centers
摘要:
Novel semiconductor structures and methods are disclosed for forming a buried recombination layer underneath the bulk portion of a hybrid orientation technology by implanting at least one recombination center generating element to reduce single event upset rates in CMOS devices thereabove. The crystalline defects in the buried recombination layer caused by the recombination center generating elements are not healed even after a high temperature anneal and serve as recombination centers where holes and electrons generated by ionizing radiation are collected by. Multiple buried recombination layers may be formed. Optionally, one such layer may be biased with a positive voltage to prevent latchup by collecting electrons.
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