发明授权
US07547646B2 Trench capacitor structure and process for applying a covering layer and a mask for trench etching processes in semiconductor substrates
失效
沟槽电容器结构和用于在半导体衬底中施加用于沟槽蚀刻工艺的覆盖层和掩模的工艺
- 专利标题: Trench capacitor structure and process for applying a covering layer and a mask for trench etching processes in semiconductor substrates
- 专利标题(中): 沟槽电容器结构和用于在半导体衬底中施加用于沟槽蚀刻工艺的覆盖层和掩模的工艺
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申请号: US10974797申请日: 2004-10-28
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公开(公告)号: US07547646B2公开(公告)日: 2009-06-16
- 发明人: Henry Bernhardt , Michael Stadtmüller , Olaf Storbeck , Stefan Kainz
- 申请人: Henry Bernhardt , Michael Stadtmüller , Olaf Storbeck , Stefan Kainz
- 申请人地址: DE Neubiberg
- 专利权人: Infineon Technologies AG
- 当前专利权人: Infineon Technologies AG
- 当前专利权人地址: DE Neubiberg
- 代理机构: Edell, Shapiro & Finnan, LLC
- 优先权: DE10351031 20030831; DE102004024105 20040514
- 主分类号: H01L21/31
- IPC分类号: H01L21/31 ; H01L21/469
摘要:
A stress relief layer between a single-crystal semiconductor substrate and a deposited silicon nitride layer or pad nitride is formed from thermally produced silicon nitride. The stress relief layer made from thermally produced silicon nitride replaces a silicon dioxide layer or pad oxide which is customary at this location for example in connection with mask layers. After patterning of a mask, which includes a protective layer portion formed from deposited silicon nitride, the material which is provided according to the invention for the stress relief layer reduces the restrictions imposed for subsequent process steps, such as for example wet-etching steps, acting both on the semiconductor substrate or structures in the semiconductor substrate and also on the stress relief layer. The thermal nitriding is advantageously incorporated into a preanneal step for expelling oxygen from the semiconductor substrate, so that the semiconductor substrate is protected from the etching action of the expelled oxygen by the stress relief layer which is formed, there is no need for an additional temporary etching protection layer for the semiconductor substrate and the overall processing is streamlined.