Invention Grant
- Patent Title: Board on chip package and manufacturing method thereof
- Patent Title (中): 片上封装及其制造方法
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Application No.: US11715906Application Date: 2007-03-09
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Publication No.: US07550316B2Publication Date: 2009-06-23
- Inventor: Myung-Sam Kang , Chang-Sup Ryu , Jung-Hyun Park , Hoe-Ku Jung , Ji-Eun Kim
- Applicant: Myung-Sam Kang , Chang-Sup Ryu , Jung-Hyun Park , Hoe-Ku Jung , Ji-Eun Kim
- Applicant Address: KR Suwon
- Assignee: Samsung Electro-Mechanics Co., Ltd.
- Current Assignee: Samsung Electro-Mechanics Co., Ltd.
- Current Assignee Address: KR Suwon
- Priority: KR10-2006-0022844 20060310
- Main IPC: H01L21/44
- IPC: H01L21/44 ; H01L21/48 ; H01L21/50

Abstract:
An aspect of the present invention features a manufacturing method of a board on chip package. The method can comprise: (a) laminating a dry film on a carrier film, one side of which is laminated by a thin metal film; (b) patterning the dry film in accordance with a circuit wire through light exposure and developing process, and forming a solder ball pad and a circuit wire; (c) removing the dry film; (d) laminating an upper photo solder resist excluding a portion where the solder ball pad is formed; (e) etching the thin metal film formed on a portion where the upper photo solder resist is not laminated; (f) mounting a semiconductor chip on the solder ball pad by a flip chip bonding; (g) molding the semiconductor chip with a passivation material; (h) removing the carrier film and the thin metal film; and (i) laminating a lower photo solder resist under the solder ball pad. The board on chip package and the manufacturing method thereof according to the present invention can design a high density circuit since a circuit pattern is formed using a seed layer.
Public/Granted literature
- US20070210439A1 Board on chip package and manufacturing method thereof Public/Granted day:2007-09-13
Information query
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