Invention Grant
US07555671B2 Systems and methods for implementing reliability, availability and serviceability in a computer system
失效
在计算机系统中实现可靠性,可用性和可维护性的系统和方法
- Patent Title: Systems and methods for implementing reliability, availability and serviceability in a computer system
- Patent Title (中): 在计算机系统中实现可靠性,可用性和可维护性的系统和方法
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Application No.: US11513872Application Date: 2006-08-31
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Publication No.: US07555671B2Publication Date: 2009-06-30
- Inventor: Murugasamy Nachimuthu , Singaravelan Nallasellan , Mohan J. Kumar
- Applicant: Murugasamy Nachimuthu , Singaravelan Nallasellan , Mohan J. Kumar
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Schubert Osterrieder & Nickelson PLLC
- Agent Jeffrey S. Schubert
- Main IPC: G06F11/00
- IPC: G06F11/00

Abstract:
Embodiments include systems and methods for processing Reliability, Availability and Serviceability (RAS) events in a computer system. Embodiments comprise processing critical events in a first portion of a Management Interrupt (MI) period. The MI period is chosen to be not greater than a maximum tolerable Operating System (OS) latency period. If time remains in a current MI period after processing critical events, the system then processes non-critical events during the time remaining in the current MI period. If at the end of the current MI period, some non-critical events remain to be processed, a subsequent MI period is scheduled to process the remaining non-critical events.
Public/Granted literature
- US20080115138A1 Systems and methods for implementing reliability, availability and serviceability in a computer system Public/Granted day:2008-05-15
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