There are many inventions described and illustrated herein. In one aspect, the present invention is directed to a technique of, and system for inspecting integrated circuits, including, for example, patterns projected, provided or formed on a wafer using photomasks, or patterns on the photomask itself. The inspection system and technique of this aspect includes first identifying, determining and/or detecting areas and/or patterns that are potentially defective by removing, filtering and/or eliminating from a set of potential defects any and/or all typical, regular or normal patterns. The identification, determination and/or detection of potential defects may be performed relatively quickly by a rapidly executing algorithm. In this way, a first or “coarse” analysis is performed rapidly and some, many, all or substantially all of the regular, normal or typical patterns are eliminated from further analysis. Thereafter, a second more detailed analysis is performed. This second analysis focuses on the set of potential defects that were identified, determined and/or detected during the first analysis of the photomask or wafer (i.e., the “coarse” analysis). The second analysis may be considerably a more detailed or a “fine” analysis relative to the first or “coarse” analysis. Indeed, in one embodiment, the second analysis may implement a more computational intensive process, without sacrificing throughput, since only a small portion of the photomask or wafer is inspected in the second analysis. In this way, the detailed analysis of the defect candidates may identify (i) all or substantially all of the actual defects and/or (ii) only the actual defects from the potential defects identified during the first analysis.