发明授权
- 专利标题: Transistor array substrate and display panel
- 专利标题(中): 晶体管阵列基板和显示面板
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申请号: US11232368申请日: 2005-09-21
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公开(公告)号: US07573068B2公开(公告)日: 2009-08-11
- 发明人: Satoru Shimoda , Tomoyuki Shirasaki , Jun Ogura , Minoru Kumagai
- 申请人: Satoru Shimoda , Tomoyuki Shirasaki , Jun Ogura , Minoru Kumagai
- 申请人地址: JP Tokyo
- 专利权人: Casio Computer Co., Ltd.
- 当前专利权人: Casio Computer Co., Ltd.
- 当前专利权人地址: JP Tokyo
- 代理机构: Frishauf, Holtz, Goodman & Chick, P.C.
- 优先权: JP2004-273532 20040921; JP2004-273580 20040921; JP2005-269434 20050916
- 主分类号: H01L33/00
- IPC分类号: H01L33/00 ; H01L27/32
摘要:
A transistor array substrate includes a plurality of driving transistors which are arrayed in a matrix on a substrate. The driving transistor has a gate, a source, a drain, and a gate insulating film inserted between the gate, and the source and drain. A plurality of signal lines are patterned together with the gates of the driving transistors and arrayed to run in a predetermined direction on the substrate. A plurality of supply lines are patterned together with the sources and drains of the driving transistors and arrayed to cross the signal lines via the gate insulating film. The supply line is electrically connected to one of the source and the drain of the driving transistor. A plurality of feed interconnections are formed on the supply lines along the supply lines, respectively.
公开/授权文献
- US20060098521A1 Transistor array substrate and display panel 公开/授权日:2006-05-11
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