Invention Grant
US07582953B2 Package structure with leadframe on offset chip-stacked structure
有权
封装结构,带引线框架,偏移芯片堆叠结构
- Patent Title: Package structure with leadframe on offset chip-stacked structure
- Patent Title (中): 封装结构,带引线框架,偏移芯片堆叠结构
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Application No.: US11882820Application Date: 2007-08-06
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Publication No.: US07582953B2Publication Date: 2009-09-01
- Inventor: Hung Tsun Lin
- Applicant: Hung Tsun Lin
- Applicant Address: TW Hsinchu BM Hamilton
- Assignee: Chipmos Technologies Inc.,Chipmos Technologies (Bermuda) Ltd.
- Current Assignee: Chipmos Technologies Inc.,Chipmos Technologies (Bermuda) Ltd.
- Current Assignee Address: TW Hsinchu BM Hamilton
- Agency: Sinorica, LLC
- Agent Ming Chow
- Priority: TW95128831A 20060807
- Main IPC: H01L23/48
- IPC: H01L23/48

Abstract:
The present invention provides a package structure with lead-frame on stacked chips, comprising: a lead-frame, composed of a plurality of outer leads arranged in rows facing each other and a plurality of inner leads arranged in rows facing each other formed by a plurality of wires, wherein the plurality of inner leads are divided into first inner leads and second inner leads, and the length of the first inner leads is greater than that of the second inner leads; and a plurality of semiconductor chip devices. The active surface of each chip faces upward and chips are misaligned to form offset stacked structure, wherein the semiconductor chip device stacked uppermost is fixedly connected under said first inner leads, and the plurality of semiconductor chip devices are electrically connected to the first inner leads and the second inner leads on the same side edge.
Public/Granted literature
- US20080036067A1 Package structure with leadframe on offset chip-stacked structure Public/Granted day:2008-02-14
Information query
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