Invention Grant
US07601592B2 Method for forming multi-gate non-volatile memory devices using a damascene process
有权
使用镶嵌工艺形成多栅极非易失性存储器件的方法
- Patent Title: Method for forming multi-gate non-volatile memory devices using a damascene process
- Patent Title (中): 使用镶嵌工艺形成多栅极非易失性存储器件的方法
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Application No.: US12135295Application Date: 2008-06-09
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Publication No.: US07601592B2Publication Date: 2009-10-13
- Inventor: Chang-Woo Oh , Dong-Gun Park , Dong-Won Kim , Yong-Kyu Lee
- Applicant: Chang-Woo Oh , Dong-Gun Park , Dong-Won Kim , Yong-Kyu Lee
- Applicant Address: KR
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR
- Agency: Mills & Onello LLP
- Priority: KR10-2004-0025095 20040412
- Main IPC: H01L21/336
- IPC: H01L21/336 ; H01L21/3205 ; H01L21/4763 ; H01L29/80
Abstract:
According to a nonvolatile memory device having a multi gate structure and a method for forming the same of the present invention, a gate electrode is formed using a damascene process. Therefore, a charge storage layer, a tunneling insulating layer, a blocking insulating layer and a gate electrode layer are not attacked from etching in a process for forming the gate electrode, thereby forming a nonvolatile memory device having good reliability.
Public/Granted literature
- US20080242075A1 METHOD FOR FORMING NON-VOLATILE MEMORY DEVICES Public/Granted day:2008-10-02
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