发明授权
US07602245B2 Method, apparatus and system for reducing DC coupling capacitance at switching amplifier
失效
用于降低开关放大器DC耦合电容的方法，装置和系统
- 专利标题： Method, apparatus and system for reducing DC coupling capacitance at switching amplifier
- 专利标题（中）： 用于降低开关放大器DC耦合电容的方法，装置和系统
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申请号： US11889419申请日： 2007-08-13
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公开(公告)号： US07602245B2公开(公告)日： 2009-10-13
- 发明人: Seung-Bin You , Yong-Jin Cho
- 申请人： Seung-Bin You , Yong-Jin Cho
- 申请人地址： KR Gyeonggi-do
- 专利权人： Samsung Electronics Co., Ltd.
- 当前专利权人： Samsung Electronics Co., Ltd.
- 当前专利权人地址： KR Gyeonggi-do
- 代理机构： Harness, Dickey & Pierce
- 优先权： KR10-2006-0079793 20060823
- 主分类号： H03F3/217
- IPC分类号： H03F3/217
摘要：
A digital amplifier, a reference voltage generator for reducing a DC component of an amplified pulse width modulated signal of a digital amplifier, and a method of reducing a DC component of an amplified pulse width modulated signal applied to an input node of a load are described in this disclosure. The digital amplifier includes a pulse width modulation signal generator receiving an input signal and generating an amplified pulse width modulated signal, a filter filtering the amplified pulse width modulated signal and providing the filtered amplified pulse width modulated signal to an input node of a load, and a reference voltage generator providing a reference voltage to a reference node of the load to reduce a DC component of the filtered amplified pulse width modulated signal provided to the input node of the load.
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