发明授权
US07605042B2 SOI bottom pre-doping merged e-SiGe for poly height reduction 失效
SOI底部预掺杂合并的e-SiGe用于聚合高度减少

SOI bottom pre-doping merged e-SiGe for poly height reduction
摘要:
Semiconductor device structures, and methods for making such structures, are described that provide for fully-doped transistor source/drain regions while reducing or even avoiding boron penetration into the transistor channel, thereby improving the performance of the transistor. In addition, such a transistor may benefit from an SiGe layer that applies compressive stress to the transistor channel, thereby further improving the performance of the transistor.
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