发明授权
- 专利标题: Capping before barrier-removal IC fabrication method
- 专利标题(中): 阻隔去除IC封装制造方法
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申请号: US11251353申请日: 2005-10-13
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公开(公告)号: US07605082B1公开(公告)日: 2009-10-20
- 发明人: Jonathan D. Reid , Eric G. Webb , Edmund B. Minshall , Avishai Kepten , R. Marshall Stowell , Steven T. Mayer
- 申请人: Jonathan D. Reid , Eric G. Webb , Edmund B. Minshall , Avishai Kepten , R. Marshall Stowell , Steven T. Mayer
- 申请人地址: US CA San Jose
- 专利权人: Novellus Systems, Inc.
- 当前专利权人: Novellus Systems, Inc.
- 当前专利权人地址: US CA San Jose
- 代理机构: Weaver Austin Villeneuve & Sampson LLP
- 主分类号: H01L21/44
- IPC分类号: H01L21/44
摘要:
Methods of forming a capping layer on conductive lines in a semiconductor device may be characterized by the following operations: (a) providing a semiconductor substrate comprising a dielectric layer having (i) exposed conductive lines (e.g., copper lines) disposed therein, and (ii) an exposed barrier layer disposed thereon; and (b) depositing a capping layer material on at least the exposed conductive lines of the semiconductor substrate. In certain embodiments, the method may also involve removing at least a portion of a conductive layer (e.g., overburden) disposed over the barrier layer and conductive lines to expose the barrier layer.
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